X24C02B ICMIC [IC MICROSYSTEMS], X24C02B Datasheet - Page 4
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X24C02B
Manufacturer Part Number
X24C02B
Description
Serial E2PROM
Manufacturer
ICMIC [IC MICROSYSTEMS]
Datasheet
1.X24C02B.pdf
(16 pages)
X24C02
Stop Condition
All communications must be terminated by a stop condition,
which is a LOW to HIGH transition of SDA when SCL is
HIGH. The stop condition is also used by the X24C02 to
place the device in the standby power mode after a read
sequence. A stop condition can only be issued after the
transmitting device has released the
Figure 2. Definition of Start and Stop
Figure 3. Acknowledge Response From Receiver
Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device, either
master or slave, will release the bus after transmitting
eight bits. During the ninth clock cycle the receiver will
pull the SDA line LOW to acknowledge that it received the
eight bits of data. Refer to Figure 3.
TRANSMITTER
SCL FROM
RECEIVER
MASTER
OUTPUT
OUTPUT
FROM
FROM
DATA
DATA
SDA
SCL
START
START BIT
bus.
1
4
The X24C02 will respond with an acknowledge after
recognition of a start condition and its slave address. If
both the device and a write operation have been
selected, the X24C02 will respond with an acknowledge
after the receipt of each subsequent eight bit word.
In the read mode the X24C02 will transmit eight bits of data,
release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no stop
condition is generated by the master, the X24C02
will continue to transmit data. If an acknowledge is not
detected, the X24C02 will terminate further data trans-
missions. The master must then issue a stop condition to
return the X24C02 to the standby power mode and
place the device into a known state.
8
STOP BIT
ACKNOWLEDGE
9
3838 FHD F07
3838 FHD F08