STK11C88_08 SIMTEK [Simtek Corporation], STK11C88_08 Datasheet - Page 10

• Manufacturer Part Number: STK11C88_08
• Description: 32Kx8 SoftStore nvSRAM
• Manufacturer: SIMTEK [Simtek Corporation]

STK11C88
Document Control #ML0012 Rev 2.0
Internally,
the
tile information is transferred into the
After the t
be ready for
RECALL
Nonvolatile Elements. The nonvolatile data can be
recalled an unlimited number of times.
POWER-UP RECALL
During power up, or after any low-power condition
(V
latched. When V
voltage of V
be initiated and will take t
If the STK11C88 is in a
power-up
To help avoid this situation, a 10K Ohm resistor
should be connected either between W and system
V
CC
CC
SRAM
or between E and system V
Jan, 2008
< V
100
operation in no way alters the data in the
RESET
80
60
40
20
RECALL
0
RECALL
data is cleared, and second, the nonvola-
RECALL
SWITCH
), an internal
Figure 2: I
READ
cycle time the
CC
, a
, the
50
is a two-step procedure. First,
once again exceeds the sense
RECALL
and
SRAM
CC
Cycle Time (ns)
WRITE
RESTORE
100
WRITE
(max) Reads
RECALL
cycle will automatically
data will be corrupted.
SRAM
CC
to complete.
state at the end of
150
.
operations. The
TTL
CMOS
request will be
will once again
SRAM
200
cells.
10
HARDWARE PROTECT
The STK11C88 offers hardware protection against
inadvertent
conditions. When V
operations are inhibited.
LOW AVERAGE ACTIVE POWER
The STK11C88 draws significantly less current
when it is cycled at times longer than 50ns. Figure 2
shows the relationship between I
time. Worst-case current consumption is shown for
both
perature range, V
enable). Figure 3 shows the same relationship for
WRITE
than 100%, only standby current is drawn when the
chip is disabled. The overall average current drawn
by the STK11C88 depends on the following items:
1)
chip enable; 3) the overall cycle rate for accesses;
4) the ratio of
temperature; 6) the V
CMOS
100
CMOS
80
60
40
20
0
cycles. If the chip enable duty cycle is less
vs.
and
STORE
TTL
Figure 3: I
READ
50
TTL
CC
input levels; 2) the duty cycle of
CC
= 5.5V, 100% duty cycle on chip
s to
operation during low-voltage
input levels (commercial tem-
cc
Cycle Time (ns)
< V
100
level; and 7) I/O loading.
CC
WRITE
SWITCH
(max) Writes
150
, all software
TTL
s; 5) the operating
CMOS
CC
and
200
READ
STORE
cycle