S-9365AAAAAI6TIG2 SII [Seiko Instruments Inc], S-9365AAAAAI6TIG2 Datasheet - Page 23

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S-9365AAAAAI6TIG2

Manufacturer Part Number
S-9365AAAAAI6TIG2
Description
STEP-UP, SUPER-SMALL PACKAGE, 1.2 MHz PWM CONTROL or PWM/PFM SWITCHABLE SWITCHING REGULATOR CONTROLLER
Manufacturer
SII [Seiko Instruments Inc]
Datasheet
Rev.1.1
STEP-UP, SUPER-SMALL PACKAGE, 1.2 MHz PWM CONTROL or PWM/PFM SWITCHABLE SWITCHING REGULATOR CONTROLLER
6. Output voltage setting resistors (R
For the S-8365/8366 Series, V
resistors between the VOUT and VSS pins.
Because V
Connect divider resistors R
an effect, adjust the values of R
C
By setting the zero point (the phase feedback) by adding capacitor C
parallel, the phase margin increases, improving the stability of the feedback loop. To effectively use the feedback
portion of the phase based on the zero point, define C
This equation is only a guide.
The following explains the optimum setting.
To efficiently use the feedback portion of the phase based on the zero point, specify settings so that the phase
feeds back at the zero point frequency (f
(f
The following equations are used to determine the pole frequency of L and C
using R
The transient response can be improved by setting the zero point frequency in a lower frequency range. If, however,
the zero point frequency is set in a significantly lower range, the gain increases in the range of high frequency and
the phase margin decreases. This might result in unstable operation. Determine the proper value after sufficient
evaluation with actual application.
The typical constants based on our evaluation are shown in Table 15.
pole
FB
, which is connected in parallel with R
) of L and C
V
_00
OUT(S)
3.32
3.32
15.0
15.0
FB1
1.8
1.8
5.0
5.0
9.0
9.0
FB
and C
[V]
= 0.6 V typ., V
f
V
C
f
pole
zero
OUT
FB
OUT
FB
=
.
. The zero point frequency is generally set slightly higher than the pole frequency.
2 × π ×
2 × π × R
3 × R
V
R
L × C
DD
FB1
1.2
1.2
1.2
1.2
1.8
1.8
3.3
3.3
3.3
3.3
R
[V]
FB1
+ R
FB2
FB1
OUT
Table 15 Example of Constant for External Parts
OUT
1
1
L × C
FB1
FB2
and R
OUT
can be calculated by using the following equation :
FB1
×
× C
OUT
and R
can be set to any value by using external divider resistors. Connect the divider
× 0.6
V
V
FB
FB2
R
OUT
DD
FB1
×
110
110
210
210
360
360
as close to the IC as possible to minimize the effects of noise. If noise has
30
30
68
68
FB2
FB1
FB1
zero
[kΩ]
V
V
Seiko Instruments Inc.
OUT
, is a capacitor for phase compensation.
DD
, R
so that R
) of R
FB2
), capacitor for phase compensation (C
FB1
R
FB1
FB
and C
FB2
by using the following equation :
15
15
15
15
15
15
15
15
15
15
+ R
[kΩ]
FB2
FB
according to the phase delay at the pole frequency
< 100 kΩ.
C
FB
FB
100
82
82
68
68
56
39
33
39
33
[pF]
to output voltage setting resistor R
OUT
and the zero point frequency set
L [µH]
S-8365/8366 Series
3.3
2.2
3.3
2.2
3.3
2.2
3.3
2.2
3.3
2.2
FB
)
C
OUT
10
10
10
10
22
22
22
22
22
22
[µF]
FB1
23
in

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