W9812G6GH-6 WINBOND [Winbond], W9812G6GH-6 Datasheet - Page 12

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W9812G6GH-6

Manufacturer Part Number
W9812G6GH-6
Description
2M X 4 BANKS X 16 BITS SDRAM
Manufacturer
WINBOND [Winbond]
Datasheet

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8. OPERATION MODE
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 1 shows the truth table for the operation commands.
Table 1 Truth Table (Note (1), (2))
Notes:
(1) v = valid
(2) CKEn signal is input level when commands are provided.
(3) These are state of bank designated by BS0, BS1 signals.
(4) Device state is full page burst operation.
(5) Power Down Mode can not be entered in the burst cycle.
Bank Active
Bank Precharge
Precharge All
Write
Write with Auto-precharge
Read
Read with Auto-precharge
Mode Register Set
No – Operation
Burst Stop
Device Deselect
Auto - Refresh
Self - Refresh Entry
Self Refresh Exit
Clock suspend Mode Entry
Power Down Mode Entry
Clock Suspend Mode Exit
Power Down Mode Exit
Data write/Output Enable
Data Write/Output Disable
CKEn-1 signal is the input level one clock cycle before the command is issued.
When this command asserts in the burst cycle, device state is clock suspend mode.
COMMAND
x = Don’t care
(power down)
L = Low Level H = High Level
Active (3)
Active (3)
Active (3)
Active (3)
Active (4)
Active (5)
DEVICE
STATE
Active
Active
Active
Active
(S.R.)
Any
Any
Any
Any
Any
Idle
Idle
Idle
Idle
Idle
idle
CKEn-1 CKEn DQM BS0, 1 A10
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
H
L
H
H
H
x
x
x
x
x
x
x
x
x
L
L
L
x
x
x
x
- 12 -
H
x
L
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
v
v
x
v
v
v
v
v
x
x
x
x
x
x
x
x
x
x
x
x
x
Publication Release Date:Aug. 13, 2007
H
H
H
v
L
L
L
v
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
A0−A9
A11
v
v
x
x
x
x
x
v
v
v
v
x
x
x
x
x
x
x
x
x
x
x
x
W9812G6GH
CS RAS
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
x
L
x
L
x
x
H
H
H
H
H
H
H
H
H
L
L
L
L
x
L
L
x
x
x
x
x
x
x
Revision A06
CAS
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
x
x
x
x
x
x
x
x
WE
H
H
H
H
H
H
L
L
L
L
L
L
x
x
x
x
x
x
x
x
x
x
x

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