AT26F004-SSU ATMEL [ATMEL Corporation], AT26F004-SSU Datasheet - Page 14

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AT26F004-SSU

Manufacturer Part Number
AT26F004-SSU
Description
4-megabit 2.7-volt Only Serial Firmware DataFlash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
9.2
14
Write Disable
AT26F004
The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Reg-
ister to the logical “0” state. With the WEL bit reset, all program, erase, Protect Sector, Unprotect
Sector, and Write Status Register commands will not be executed. The Write Disable command
is also used to exit the Sequential Program mode. Other conditions can also cause the WEL bit
to be reset; for more details, refer to the
To issue the Write Disable command, the CS pin must first be asserted and the opcode of 04h
must be clocked into the device. No address bytes need to be clocked into the device, and any
data clocked in after the opcode will be ignored. When the CS pin is deasserted, the WEL bit in
the Status Register will be reset to a logical “0”. The complete opcode must be clocked into the
device before the CS pin is deasserted; otherwise, the device will abort the operation and the
state of the WEL bit will not change.
Figure 9-2.
Write Disable
SCK
SO
CS
SI
“WEL Bit” on page
HIGH-IMPEDANCE
MSB
0
0
0
1
0
2
OPCODE
0
3
0
4
1
5
0
6
0
20.
7
3588A–DFLSH–10/05

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