W25X10BLSNIG WINBOND [Winbond], W25X10BLSNIG Datasheet - Page 28
![no-image](/images/no-image-200.jpg)
W25X10BLSNIG
Manufacturer Part Number
W25X10BLSNIG
Description
1M-BIT, 2M-BIT AND 4M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI
Manufacturer
WINBOND [Winbond]
Datasheet
1.W25X10BLSNIG.pdf
(53 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
W25X10BLSNIG
Manufacturer:
ARTESYN
Quantity:
23
W25X10BL/20BL/40BL
9.2.15
Sector Erase (20h)
The Sector Erase instruction sets all memory within a specified sector (4K-bytes) to the erased state of
all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Sector
Erase Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS
pin low and shifting the instruction code “20h” followed a 24-bit sector address (A23-A0) (see Figure 2).
The Sector Erase instruction sequence is shown in figure 15.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done
the Sector Erase instruction will not be executed. After /CS is driven high, the self-timed Sector Erase
instruction will commence for a time duration of t
(See AC Characteristics). While the Sector Erase
SE
cycle is in progress, the Read Status Register instruction may still be accessed for checking the status
of the BUSY bit. The BUSY bit is a 1 during the Sector Erase cycle and becomes a 0 when the cycle is
finished and the device is ready to accept other instructions again. After the Sector Erase cycle has
finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Sector Erase
instruction will not be executed if the addressed page is protected by the Block Protect (TB, BP2, BP1,
and BP0) bits (see Status Register Memory Protection table).
Figure 15. Sector Erase Instruction Sequence Diagram
- 28 -