M24128-BR3BN6T STMICROELECTRONICS [STMicroelectronics], M24128-BR3BN6T Datasheet - Page 2

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M24128-BR3BN6T

Manufacturer Part Number
M24128-BR3BN6T
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M24256-B, M24128-B
Figure 2A. PSDIP8 Connections
Figure 2B. SO8 and TSSOP8 Connections
Table 2. Absolute Maximum Ratings
Note: 1. Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
2/19
Symbol
T
2. MIL-STD-883C, 3015.7 (100 pF, 1500
T
V
V
V
LEAD
T
STG
ESD
CC
IO
A
cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
V SS
E0
E1
E2
V SS
Ambient Operating Temperature
Storage Temperature
Lead Temperature during Soldering
Input or Output range
Supply Voltage
Electrostatic Discharge Voltage (Human Body model)
E0
E1
E2
M24256-B
M24128-B
M24256-B
M24128-B
1
2
3
4
1
2
3
4
AI02811
AI02810
8
7
6
5
8
7
6
5
V CC
WC
SCL
SDA
V CC
WC
SCL
SDA
)
Parameter
1
PSDIP8: 10 seconds
SO8: 40 seconds
TSSOP8: 40 seconds
TSSOP14: 40 seconds
Figure 2C. TSSOP14 Connections
Note: 1. NC = Not Connected
The memory behaves as a slave device in the I
protocol, with all memory operations synchronized
by the serial clock. Read and Write operations are
initiated by a START condition, generated by the
bus master. The START condition is followed by a
Device Select Code and RW bit (as described in
Table 3), terminated by an acknowledge bit.
When writing data to the memory, the memory in-
serts an acknowledge bit during the 9
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a STOP condition after an Ack for WRITE, and af-
ter a NoAck for READ.
Power On Reset: V
In order to prevent data corruption and inadvertent
write operations during power up, a Power On Re-
2
V SS
NC
NC
NC
E0
E1
E2
M24256-B
M24128-B
1
2
3
4
5
6
7
CC
Lock-Out Write Protect
AI02812
-40 to 125
-65 to 150
-0.6 to 6.5
-0.3 to 6.5
14
13
12
11
10
Value
4000
9
8
260
215
215
215
V CC
WC
NC
NC
NC
SCL
SDA
th
bit time,
Unit
V
V
V
C
C
C
2
C

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