M24128-BFBN3G STMICROELECTRONICS [STMicroelectronics], M24128-BFBN3G Datasheet

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M24128-BFBN3G

Manufacturer Part Number
M24128-BFBN3G
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Features
Table 1.
September 2008
M24128
M24C64
M24C32
Reference
Two-wire I
supports 400 kHz protocol
Single supply voltages (see
part numbers):
– 2.5 V to 5.5 V
– 1.8 V to 5.5 V
– 1.7 V to 5.5 V
Write Control input
Byte and Page Write
Random and Sequential Read modes
Self-timed programming cycle
Automatic address incrementing
Enhanced ESD/latch-up protection
More than 1 Million write cycles
More than 40-year data retention
Packages
– ECOPACK
Device summary
2
M24128-BW
M24128-BR
M24128-BF
M24C64-W
M24C64-R
M24C64-F
M24C32-W
M24C32-R
M24C32-F
C serial interface
®
Part number
(RoHS compliant)
128 Kbit, 64 Kbit and 32 Kbit serial I²C bus EEPROM
Table 1
2.5 V to 5.5V
1.8 V to 5.5V
1.7 V to 5.5V
2.5 V to 5.5V
1.8 V to 5.5V
1.7 V to 5.5V
2.5 V to 5.5V
1.8 V to 5.5V
1.7 V to 5.5V
Supply voltage
for root
Rev 15
M24C64 M24C32
2 × 3 mm (MLP)
UFDFPN8 (MB)
WLCSP (CS)
TSSOP8 (DW)
150 mil width
169 mil width
PDIP8 (BN)
SO8 (MN)
M24128
www.st.com
1/39
1

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M24128-BFBN3G Summary of contents

Page 1

... M24C32-W M24C32 M24C32-R M24C32-F September 2008 Table 1 for root Supply voltage 2 5.5V 1 5.5V 1 5.5V 2 5.5V 1 5.5V 1 5.5V 2 5.5V 1 5.5V 1 5.5V Rev 15 M24128 M24C64 M24C32 PDIP8 (BN) SO8 (MN) 150 mil width TSSOP8 (DW) 169 mil width UFDFPN8 (MB) 2 × (MLP) WLCSP (CS) www.st.com 1/39 1 ...

Page 2

... Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.9 ECC (error correction code) and write cycling . . . . . . . . . . . . . . . . . . . . . 17 4.10 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 4.11 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.14 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.15 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 M24128, M24C64, M24C32 ...

Page 3

... M24128, M24C64, M24C32 5 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Contents 3/39 ...

Page 4

... TSSOP8 – 8 lead thin shrink small outline, package mechanical data Table 22. UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 23. M24128 WLCSP, 0.5 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 24. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 25. Available M24C32 products (package, voltage range, temperature grade Table 26 ...

Page 5

... SO8 narrow – 8 lead plastic small outline, 150 mils body width, package outline . . . . . . . 30 Figure 16. TSSOP8 – 8 lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 17. UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package outline Figure 18. M24128 WLCSP, 0.5 mm pitch, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 List of figures 2 C bus . . . . . . . . . . . . . . 10 5/39 ...

Page 6

... Description 1 Description The M24C32, M24C64 and M24128 devices are I programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. Figure 1. Logic diagram uses a two-wire serial interface, comprising a bi-directional data line and a clock line. ...

Page 7

... SDA SCL Figure 2. DIP, SO, TSSOP and UFDFPN connections 1. See Package mechanical data Figure 3. M24128 WLCSP connections (top view, marking side, with balls on the underside) Function Chip Enable Serial Data Serial Clock Write Control Supply voltage Ground M24128 M24C64 M24C32 ...

Page 8

... When Write Control (WC) is driven high, device select and Address bytes are acknowledged, Data bytes are not acknowledged. 8/39 indicates how the value of the pull-up resistor can be calculated M24xxx M24xxx M24128, M24C64, M24C32 . (Figure 5 indicates how CC Figure 4. When not connected (left Ai12806 , and IL CC ...

Page 9

... M24128, M24C64, M24C32 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V In order to secure a stable DC supply voltage recommended to decouple the V with a suitable capacitor (usually of the order 100 nF) close to the V package pins ...

Page 10

... Bus line capacitor (pF) SDA SDA Start Input Change Condition MSB MSB M24128, M24C64, M24C32 400 kHz, t LOW = 1.3 µs Rbus x Cbus time V CC constant must be less than 500 ns R bus SCL I²C bus master SDA C bus Stop ...

Page 11

... M24128, M24C64, M24C32 Table 3. Device select code Device select code 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. Table 4. Address most significant byte b15 b14 Table 5. Address least significant byte ...

Page 12

... Memory organization 3 Memory organization The memory is organized as shown in Figure 7. Block diagram SCL SDA 12/39 Figure 7. Control Logic I/O Shift Register Address Register and Counter M24128, M24C64, M24C32 High Voltage Generator Data Register 1 Page X Decoder AI06899 ...

Page 13

... The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M24C32, M24C64 and M24128 devices are always slaves in all communications. ...

Page 14

... for M24C64 and M24C32 for M24128 M24128, M24C64, M24C32 2 C bus. Each one is given a th bit time. If the device does not match Initial sequence Start, device select Start, device select Address reStart, device select Similar to Current or Random Address ...

Page 15

... M24128, M24C64, M24C32 Figure 8. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) ACK ACK Dev select Byte address Byte address R/W ACK ACK Dev select Byte address Byte address R/W NO ACK NO ACK Data in N Device operation ...

Page 16

... The Page Write mode allows bytes (for the M24C32 and M24C64 bytes (for the M24128 written in a single Write cycle, provided that they are all located in the same ’row’ in the memory: that is, the most significant memory address bits (b13-b6 for M24128, b12-b5 for M24C64, and b11-b5 for M24C32) are the same. If more bytes are sent than will fit up to the end of the row, a condition known as ‘ ...

Page 17

... All M24C32, M24C64 and M24128 devices are qualified at 1 million (1 000 000) write cycles; the M24128 and M24C64 in UFDFPN8 (MLP) 2 × package and the M24128 in WLCSP package are qualified (at 1 million write cycles), using a cycling routine that writes to the device by multiples of 4-byte words ...

Page 18

... Stop Data for the Write operation Continue the Write operation and , but the typical time is shorter. To make use of this, a polling Table 18 Figure 10, is: M24128, M24C64, M24C32 YES Send address and receive ACK NO Start YES condition Device select with Continue the ...

Page 19

... M24128, M24C64, M24C32 Figure 11. Read mode sequences Current Address Read Random Address Read Sequential Current Read Sequential Random Read 1. The seven most significant bits of the device select code of a Random Read (in the 1 be identical. ACK NO ACK Dev select Data out R/W ACK ...

Page 20

... For all Read commands, the device waits, after each byte read, for an acknowledgment th during the 9 bit time. If the bus master does not drive Serial Data (SDA) low during this time, the device terminates the data transfer and switches to its Standby mode. 20/39 Figure 11. M24128, M24C64, M24C32 ...

Page 21

... M24128, M24C64, M24C32 5 Initial delivery state The device is delivered with all bits in the memory array set to 1 (each byte contains FFh). 6 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the Operating sections of this specification, is not implied ...

Page 22

... Input rise and fall times Input levels Input and output timing reference levels Figure 12. AC test measurement I/O waveform 22/39 Parameter Parameter Parameter Parameter Input Levels Timing Reference Levels 0.8V CC 0.2V CC M24128, M24C64, M24C32 Min. Max. Unit 2.5 5.5 –40 85 °C –40 125 °C Min. Max. ...

Page 23

... M24128, M24C64, M24C32 Table 12. Input parameters Symbol C Input capacitance (SDA Input capacitance (other pins input impedance WCL ( input impedance WCH Pulse width ignored ( (Input filter on SCL and SDA) 1. Characterized only. Table 13. DC characteristics (M24xxx-W, device grade 6) ...

Page 24

... Standby mode SDA Hi-Z, external voltage applied on SDA 1 During t , 1.8 V < 1.8 V < M24128, M24C64, M24C32 Min. Table < 5 400 kHz c < 5 < 5 – ...

Page 25

... M24128, M24C64, M24C32 Table 16. DC characteristics (M24xxx-F) Symbol Input leakage current I LI (SCL, SDA, E2, E1, E0) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage (SDA, SCL WC) Input high voltage (SDA, SCL, ...

Page 26

... Start condition set up time Start condition hold time Stop condition set up time Time between Stop condition and next Start condition Write time 2 C specification (which specifies t SU:DAT Figure = 5 ms (instead of 10ms). W M24128, M24C64, M24C32 and Table 9 Min. Max. 400 600 1300 20 300 20 300 ...

Page 27

... M24128, M24C64, M24C32 Table 18. AC characteristics (M24xxx-F) Symbol Alt SCL t t CHCL HIGH t t CLCH LOW ( XH1XH2 R ( XL1XL2 DL1DL2 DXCX SU:DAT t t CLDX HD:DAT t t CLQX DH (2)( CLQV AA ( CHDX SU:STA t t DLCL HD:STA ...

Page 28

... SCL SDA In tCHDH Stop condition SCL tCLQV SDA Out 28/39 tCHCL tCLCH tCLDX tDXCX SDA Change SDA Input tW Write cycle tCHCL tCLQX Data valid Data valid M24128, M24C64, M24C32 tXL1XL2 tCHDH tDHDL Stop Start condition condition tCHDX Start condition tDL1DL2 AI00795e ...

Page 29

... M24128, M24C64, M24C32 8 Package mechanical data In order to meet environmental requirements, ST offers the M24C32, M24C64 and M24128 ® in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 30

... Typ Min Max 1.75 0.10 0.25 1.25 0.28 0.48 0.17 0.23 0.10 4.90 4.80 5.00 6.00 5.80 6.20 3.90 3.80 4.00 1.27 – – 0.25 0.50 0° 8° 0.40 1.27 1.04 M24128, M24C64, M24C32 h x 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.0110 0.0067 0.1929 0.1890 0.2362 0.2283 0.1535 0.1496 0.0500 – 0° 0.0157 0.0410 Max 0.0689 0.0098 0.0189 0.0091 ...

Page 31

... M24128, M24C64, M24C32 Figure 16. TSSOP8 – 8 lead thin shrink small outline, package outline Drawing is not to scale. Table 21. TSSOP8 – 8 lead thin shrink small outline, package mechanical data Symbol Values in inches are converted from mm and rounded to 4 decimal digits. ...

Page 32

... A1 millimeters Typ Min Max 0.55 0.50 0.60 0.02 0.00 0.05 0.25 0.20 0.30 2.00 1.90 2.10 1.60 1.50 1.70 0.08 3.00 2.90 3.10 0.20 0.10 0.30 0.50 – – 0.45 0.40 0.50 0.15 0.30 M24128, M24C64, M24C32 UFDFPN-01 (1) inches Typ Min Max 0.0217 0.0197 0.0236 0.0008 0 0.0020 0.0098 0.0079 0.0118 0.0787 0.0748 0.0827 0.0630 0.0591 0.0669 0.0031 0.1181 0.1142 0.1220 0.0079 0.0039 0.0118 0.0197 – ...

Page 33

... M24128, M24C64, M24C32 Figure 18. M24128 WLCSP, 0.5 mm pitch, package outline Drawing is not to scale. Table 23. M24128 WLCSP, 0.5 mm pitch, package mechanical data Symbol Typ. A 0.585 A1 0.230 A2 0.355 B 0.320 D 1.805 E 1.400 e e1 0.886 e2 0.250 e3 0.443 F 0.257 G 0.4025 ( Values in inches are converted from mm and rounded to 4 decimal digits. ...

Page 34

... Used only for device grade 3 and WLCSP packages. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 34/39 M24C32– ® (RoHS compliant) M24128, M24C64, M24C32 (1) over –40 to 125°C. ...

Page 35

... Available M24C32 products (package, voltage range, temperature grade) Package DIP8 (BN) SO8N (MN) TSSOP8 (DW) MLP8 (MB) Table 26. Available M24C64 products (package, voltage range, temperature grade) Package DIP8 (BN) SO8N (MN) TSSOP8 (DW) MLP8 (MB) Table 27. Available M24128 products (package, voltage range, temperature grade) Package DIP8 (BN) SO8N (MN) TSSOP8 (DW) MLP8 (MB) WLCSP (CS) M24C32-F M24C32-R 1 5 Grade 6 ...

Page 36

... Product List summary table added. Device Grade 3 added. 4.5-5.5V range is Not for New Design. Some minor wording changes. AEC-Q100- 5.0 002 compliance. t (max) changed pins of the device. Z WCL 6.0 UFDFPN8 package added. Small text changes. M24128, M24C64, M24C32 Changes for E2-E0 and LI (min) improved to -0.45V. IL (min) and V (min) improved ...

Page 37

... Table 13: DC characteristics (M24xxx-W, device grade CC1 6). 8 Note 1 added to Table 16: DC characteristics (M24xxx-F) modified. UFDFPN8 package specifications updated (see and M24128-BR part numbers added. 9 Generic part number corrected in I corrected in Table 14 CC0 Packages are ECOPACK® compliant. Available packages and temperature ranges by product specified in ...

Page 38

... Section 2.6.4: Power-down conditions Supply voltage ( Updated Figure 5: Maximum R 2 (C) for bus. Replace M24128 and M24C64 by M24128-BFMB6 and M24C64-FMB6, respectively, in Section 4.9: ECC (error correction code) and write cycling. Added temperature grade 6 in F). Updated test conditions for I (M24xxx-W, device grade 12 device grade ...

Page 39

... M24128, M24C64, M24C32 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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