M24128-BF STMICROELECTRONICS [STMicroelectronics], M24128-BF Datasheet
M24128-BF
Available stocks
Related parts for M24128-BF
M24128-BF Summary of contents
Page 1
... More than 1 Million write cycles ■ More than 40-year data retention ■ Packages – ECOPACK® (RoHS compliant) Table 1. Device summary Reference Root part number M24128-BW M24128 M24128-BR M24128-BF M24C64-W M24C64 M24C64-R M24C64-F M24C32-W M24C32 M24C32-R M24C32-F December 2007 Table 1 for root Supply voltage 2 ...
Page 2
... Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.9 ECC (error correction code) and Write cycling . . . . . . . . . . . . . . . . . . . . . 17 4.10 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 4.11 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.14 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.15 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 M24128, M24C64, M24C32 ...
Page 3
... M24128, M24C64, M24C32 5 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Contents 3/38 ...
Page 4
... Table 23. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 24. Available M24C32 products (package, voltage range, temperature grade Table 25. Available M24C64 products (package, voltage range, temperature grade Table 26. Available M24128 products (package, voltage range, temperature grade Table 27. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4/38 M24128, M24C64, M24C32 ...
Page 5
... M24128, M24C64, M24C32 List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. DIP, SO, TSSOP and UFDFPN connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Maximum R value versus bus parasitic capacitance (C) for Figure bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Write mode sequences with (data write inhibited Figure 8 ...
Page 6
... Description 1 Description The M24C32, M24C64 and M24128 devices are I programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant. ECOPACK trademark. ...
Page 7
... M24128, M24C64, M24C32 Table 2. Signal names Signal name E0, E1, E2 SDA SCL Figure 2. DIP, SO, TSSOP and UFDFPN connections 1. See Package mechanical Function Chip Enable Serial Data Serial Clock Write Control Supply voltage Ground M24128 M24C64 M24C32 ...
Page 8
... When Write Control (WC) is driven high, device select and Address bytes are acknowledged, Data bytes are not acknowledged. 8/38 indicates how the value of the pull-up resistor can be calculated M24xxx M24xxx M24128, M24C64, M24C32 . (Figure 4 indicates how CC Figure 3. When not connected (left Ai12806 , and IL CC ...
Page 9
... M24128, M24C64, M24C32 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V In order to secure a stable DC supply voltage recommended to decouple the V with a suitable capacitor (usually of the order 100 nF) close to the V package pins ...
Page 10
... Bus line capacitor (pF) SDA SDA Start Input Change Condition MSB MSB M24128, M24C64, M24C32 400 kHz, t LOW = 1.3 µs Rbus x Cbus time V CC constant must be less than 500 ns R bus SCL I²C bus master SDA C bus Stop ...
Page 11
... M24128, M24C64, M24C32 Table 3. Device select code Device select code 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. Table 4. Address most significant byte b15 b14 Table 5. Address least significant byte ...
Page 12
... Memory organization 3 Memory organization The memory is organized as shown in Figure 6. Block diagram SCL SDA 12/38 Figure 6. Control Logic I/O Shift Register Address Register and Counter M24128, M24C64, M24C32 High Voltage Generator Data Register 1 Page X Decoder AI06899 ...
Page 13
... The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M24C32, M24C64 and M24128 devices are always slaves in all communications. ...
Page 14
... ≤ 32 for M24C64 and M24C32 ≤ 64 for M24128 M24128, M24C64, M24C32 2 C bus. Each one is given a th bit time. If the device does not match Initial sequence Start, device select Start, device select Address reStart, device select ...
Page 15
... M24128, M24C64, M24C32 Figure 7. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) ACK ACK Dev select Byte address Byte address R/W ACK ACK Dev select Byte address Byte address R/W NO ACK NO ACK Data in N Device operation ...
Page 16
... The Page Write mode allows bytes (for the M24C32 and M24C64 bytes (for the M24128 written in a single Write cycle, provided that they are all located in the same ’row’ in the memory: that is, the most significant memory address bits (b13-b6 for M24128, b12-b5 for M24C64, and b11-b5 for M24C32) are the same. If more bytes are sent than will fit up to the end of the row, a condition known as ‘ ...
Page 17
... All M24C32, M24C64 and M24128 devices are qualified at 1 million (1 000 000) write cycles; the M24128-BFMB6 and M24C64-FMB6 are qualified (at 1 million write cycles), using a cycling routine that writes to the device by multiples of 4-byte words. ...
Page 18
... Stop Data for the Write operation Continue the Write operation and , but the typical time is shorter. To make use of this, a polling Table 18 Figure 9, is: M24128, M24C64, M24C32 YES Send address and receive ACK NO Start YES condition Device select with Continue the ...
Page 19
... M24128, M24C64, M24C32 Figure 10. Read mode sequences Current Address Read Random Address Read Sequential Current Read Sequential Random Read 1. The seven most significant bits of the device select code of a Random Read (in the 1 be identical. ACK NO ACK Dev select Data out R/W ACK ...
Page 20
... For all Read commands, the device waits, after each byte read, for an acknowledgment th during the 9 bit time. If the bus master does not drive Serial Data (SDA) low during this time, the device terminates the data transfer and switches to its Standby mode. 20/38 Figure 10. M24128, M24C64, M24C32 ...
Page 21
... M24128, M24C64, M24C32 5 Initial delivery state The device is delivered with all bits in the memory array set to 1 (each byte contains FFh). 6 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the Operating sections of this specification, is not implied ...
Page 22
... Input rise and fall times Input levels Input and output timing reference levels Figure 11. AC test measurement I/O waveform 22/38 Parameter Parameter Parameter Parameter Input Levels Timing Reference Levels 0.8V CC 0.2V CC M24128, M24C64, M24C32 Min. Max. Unit 2.5 5.5 –40 85 °C –40 125 °C Min. Max. ...
Page 23
... M24128, M24C64, M24C32 Table 12. Input parameters Symbol C Input capacitance (SDA Input capacitance (other pins input impedance WCL ( input impedance WCH Pulse width ignored ( (Input filter on SCL and SDA) 1. Characterized only. Table 13. DC characteristics (M24xxx-W, device grade 6) ...
Page 24
... SDA Hi-Z, external voltage applied on SDA 1 During t , 1.8 V < 1.8 V < V 1.8 V ≤ V 2.5 V ≤ V 1.8 V ≤ V 2.5 V ≤ mA M24128, M24C64, M24C32 Min. Table < 5 400 kHz c < 5 < ...
Page 25
... M24128, M24C64, M24C32 Table 16. DC characteristics (M24xxx-F) Symbol Input leakage current I LI (SCL, SDA, E2, E1, E0) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage (SDA, SCL WC) Input high voltage (SDA, SCL, ...
Page 26
... Start condition set up time Start condition hold time Stop condition set up time Time between Stop condition and next Start condition Write time 2 C specification (which specifies t SU:DAT Figure = 5 ms (instead of 10ms). W M24128, M24C64, M24C32 and Table 9 Min. Max. 400 600 1300 20 300 20 300 ...
Page 27
... M24128, M24C64, M24C32 Table 18. AC characteristics (M24xxx-F) Symbol Alt SCL t t CHCL HIGH t t CLCH LOW ( XH1XH2 R ( XL1XL2 DL1DL2 DXCX SU:DAT t t CLDX HD:DAT t t CLQX DH (2)( CLQV AA ( CHDX SU:STA t t DLCL HD:STA ...
Page 28
... SCL SDA In tCHDH Stop condition SCL tCLQV SDA Out 28/38 tCHCL tCLCH tCLDX tDXCX SDA Change SDA Input tW Write cycle tCHCL tCLQX Data valid Data valid M24128, M24C64, M24C32 tXL1XL2 tCHDH tDHDL Stop Start condition condition tCHDX Start condition tDL1DL2 AI00795e ...
Page 29
... M24128, M24C64, M24C32 8 Package mechanical Figure 13. PDIP8 – 8 pin plastic DIP, 0.25 mm lead frame, package outline 1. Drawing is not to scale. Table 19. PDIP8 – 8 pin plastic DIP, 0.25 mm lead frame, package mechanical data Symbol Values in inches are converted from mm and rounded to 4 decimal digits. ...
Page 30
... Typ Min Max 1.75 0.10 0.25 1.25 0.28 0.48 0.17 0.23 0.10 4.90 4.80 5.00 6.00 5.80 6.20 3.90 3.80 4.00 1.27 – – 0.25 0.50 0° 8° 0.40 1.27 1.04 M24128, M24C64, M24C32 h x 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.0110 0.0067 0.1929 0.1890 0.2362 0.2283 0.1535 0.1496 0.0500 – 0° 0.0157 0.0410 Max 0.0689 0.0098 0.0189 0.0091 ...
Page 31
... M24128, M24C64, M24C32 Figure 15. TSSOP8 – 8 lead thin shrink small outline, package outline Drawing is not to scale. Table 21. TSSOP8 – 8 lead thin shrink small outline, package mechanical data Symbol α 1. Values in inches are converted from mm and rounded to 4 decimal digits. ...
Page 32
... A1 millimeters Typ Min Max 0.55 0.50 0.60 0.02 0.00 0.05 0.25 0.20 0.30 2.00 1.90 2.10 1.60 1.50 1.70 0.08 3.00 2.90 3.10 0.20 0.10 0.30 0.50 – – 0.45 0.40 0.50 0.15 0.30 M24128, M24C64, M24C32 UFDFPN-01 (1) inches Typ Min Max 0.0217 0.0197 0.0236 0.0008 0 0.0020 0.0098 0.0079 0.0118 0.0787 0.0748 0.0827 0.0630 0.0591 0.0669 0.0031 0.1181 0.1142 0.1220 0.0079 0.0039 0.0118 0.0197 – ...
Page 33
... M24128, M24C64, M24C32 9 Part numbering Table 23. Ordering information scheme Example: Device type 2 M24 = I C serial access EEPROM Device function 128–B = 128 Kbit (16384 x 8) C64– Kbit (8192 x 8) C32– Kbit (4096 x 8) Operating voltage 5.5 V ...
Page 34
... MLP8 (MB) 34/38 M24C32-F M24C32-R 1 5 Grade 6 Grade 5 Grade 6 Grade 5 Grade 6 M24C64-F M24C64-R 1 5 Grade 6 Grade 5 Grade 6 Grade 6 Grade 6 M24128-BF M24128-BR 1 5 Grade 6 - Grade 6 Grade 6 Grade 6 M24128, M24C64, M24C32 M24C32 Grade6 Grade 3 Grade 6 Grade 6 - M24C64 ...
Page 35
... M24128, M24C64, M24C32 10 Revision history Table 27. Document revision history Date Revision 22-Dec-1999 28-Jun-2000 31-Oct-2000 20-Apr-2001 16-Jan-2002 02-Aug-2002 04-Feb-2003 27-May-2003 22-Oct-2003 01-Jun-2004 04-Nov-2004 05-Jan-2005 TSSOP8 package in place of TSSOP14 ( OrderingInfo, 2.3 PackageMechData). 2.4 TSSOP8 package data corrected References to Temperature Range 3 removed from Ordering Information 2 ...
Page 36
... Table 13: DC characteristics (M24xxx-W, device grade CC1 6). 8 Note 1 added to Table 16: DC characteristics (M24xxx-F) modified. UFDFPN8 package specifications updated (see and M24128-BR part numbers added. 9 Generic part number corrected in I corrected in Table 14 CC0 Packages are ECOPACK® compliant. Available packages and temperature ranges by product specified in ...
Page 37
... Section 2.6.4: Power-down conditions Supply voltage (VCC). Updated Figure 4: Maximum RP value versus bus parasitic capacitance (C) for an I2C bus. Replace M24128 and M24C64 by M24128-BFMB6 and M24C64-FMB6, respectively, in Section 4.9: ECC (error correction code) and Write cycling. Added temperature grade 6 in F). Updated test conditions for I ...
Page 38
... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 38/38 Please Read Carefully: © 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M24128, M24C64, M24C32 ...