M95160-F_12 STMICROELECTRONICS [STMicroelectronics], M95160-F_12 Datasheet - Page 19

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M95160-F_12

Manufacturer Part Number
M95160-F_12
Description
16-Kbit serial SPI bus EEPROM with high-speed clock
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M95160 M95160-W M95160-R M95160-F
6.3.4
SRWD bit
The Status Register Write Disable (SRWD) bit is operated in conjunction with the Write
Protect (W) signal. The Status Register Write Disable (SRWD) bit and Write Protect (W)
signal enable the device to be put in the Hardware Protected mode (when the Status
Register Write Disable (SRWD) bit is set to 1, and Write Protect (W) is driven low). In this
mode, the non-volatile bits of the Status Register (SRWD, BP1, BP0) become read-only bits
and the Write Status Register (WRSR) instruction is no longer accepted for execution.
Table 5.
Status Register Write Protect
SRWD
b7
Status Register format
0
Doc ID 022580 Rev 1
0
0
BP1
Block Protect bits
Write Enable Latch bit
BP0
WEL
Write In Progress bit
Instructions
WIP
b0
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