M24C02-125 STMICROELECTRONICS [STMicroelectronics], M24C02-125 Datasheet - Page 14

• Manufacturer Part Number: M24C02-125
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Device operation
3.6.1
3.6.2
14/30
Byte Write
After the device select code and the address byte, the bus master sends one data byte. If
the addressed location is Write-protected, by Write Control (WC) being driven High, the
device replies to the data byte with NoAck, as shown in
modified. If, instead, the addressed location is not Write-protected, the device replies with
Ack. The bus master terminates the transfer by generating a Stop condition, as shown in
Figure
Page Write
The Page Write mode allows up to 16 bytes to be written in a single Write cycle, provided
that they are all located in the same page in the memory: that is, the most significant
memory address bits are the same. If more bytes are sent than will fit up to the end of the
page, a condition known as ‘roll-over’ occurs. This should be avoided, as data starts to
become overwritten in an implementation dependent way.
The bus master sends from 1 to 16 bytes of data, each of which is acknowledged by the
device if Write Control (WC) is Low. If the addressed location is Write-protected, by Write
Control (WC) being driven High, the device replies to the data bytes with NoAck, as shown
in
byte address counter (the 4 least significant address bits only) is incremented. The transfer
is terminated by the bus master generating a Stop condition.
Figure
7.
6, and the locations are not modified. After each byte is transferred, the internal
Doc ID 022564 Rev 1
M24C16-125 M24C08-125 M24C04-125 M24C02-125
Figure
6, and the location is not