M95010-R STMICROELECTRONICS [STMicroelectronics], M95010-R Datasheet - Page 41

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M95010-R

Manufacturer Part Number
M95010-R
Description
4 Kbit, 2 Kbit and 1 Kbit Serial SPI bus EEPROM with high speed Clock
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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M95040, M95020, M95010
Table 27.
06-Nov-2006
05-Oct-2004
Date
Document revision history (continued)
Version
6.0
7
Product List summary table added. Process identification letter “G”
information added. Order information for Tape and Reel changed to T.
AEC-Q100-002 compliance. Device Grade information clarified. tHHQX
corrected to tHHQV. Signal Description updated.
10MHz, 5ms Write is now the present product. tCH+tCL<1/fC constraint
clarified
Document converted to new template,
moved to below
PDIP package removed. UFDFPN8 (MB) package added (see
and
and
Section 6.7: Cycling
information removed below
Figure 3: Bus master and memory devices on the SPI bus
T
Absolute maximum
Characteristics of previous product identified by process letter K removed.
CL modified in
below
Information in
modified. End timing line of t
t
Table
Plating Technology
information
CHHL
LEAD
Table
Table
18,
and t
Table 13
parameter modified,
Table
25) and SO8N package specifications updated (see
23). Packages are ECOPACK® compliant.
CHHH
scheme.
Table 17
Table 11: AC test measurement
and
19,
Section 6.3: Read Status Register
changed to t
Table
and
ratings.
Table
added.
is no longer Preliminary data, I
Process
20,
14.
Note 1
Section 4: Operating
Section 2.8: Supply voltage (V
SHQZ
Table 21
CLHL
Changes
updated in
moved in
changed, and T
and t
and
Table 5: Status Register format
CLHH
Table
Figure
Table 26: Ordering
, respectively in
conditions. Note removed
22.
features.
A
17.
(RDSR).
added to
CC
Revision history
, I
CC
modified.
CC1
)
Figure
Table 7:
added and
Figure 20
Figure 18
and V
16,
IL
41/42

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