AT28HC64BF ATMEL [ATMEL Corporation], AT28HC64BF Datasheet

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AT28HC64BF

Manufacturer Part Number
AT28HC64BF
Description
64K (8K x 8) High Speed Parallel EEPROM with Page Write and Software Data Protection
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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Features
1. Description
The AT28HC64BF is a high-performance electrically-erasable and programmable
read-only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8
bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device
offers access times to 55 ns with power dissipation of just 220 mW. When the device
is deselected, the CMOS standby current is less than 100 µA.
The AT28HC64BF is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA polling of I/O7. Once the end of a write cycle has been detected, a
new access for a read or write can begin.
Atmel’s AT28HC64BF has additional features to ensure high quality and manufactura-
bility. The device utilizes internal error correction for extended endurance and
improved data retention characteristics. An optional software data protection mecha-
nism is available to guard against inadvertent writes. The device also includes an
extra 64 bytes of EEPROM for device identification or tracking.
Fast Read Access Time – 70 ns
Automatic Page Write Operation
Fast Write Cycle Times
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling and Toggle Bit for End of Write Detection
High Reliability CMOS Technology
Single 5 V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging
– Internal Address and Data Latches for 64 Bytes
– Page Write Cycle Time: 2 ms Maximum (Standard)
– 1 to 64-byte Page Write Operation
– 40 mA Active Current
– 100 µA CMOS Standby Current
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
64K (8K x 8)
High Speed
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28HC64BF
3648A–PEEPR–10/06

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AT28HC64BF Summary of contents

Page 1

... When the device is deselected, the CMOS standby current is less than 100 µA. The AT28HC64BF is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

Page 2

... GND 14 15 AT28HC64BF 2 2.2 32-lead PLCC Top View Note: PLCC package pins 1 and 17 are Don’t Connect. 2.3 28-lead TSOP Top View VCC OE WE A11 A11 WE OE VCC A10 NC CE A12 ...

Page 3

... Page Write The page write operation of the AT28HC64BF allows bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write; after the first byte is written, it can then be followed additional bytes. Each successive byte must be loaded within 150 µ ...

Page 4

... AT28HC64BF will be protected against inadvertent writes. It should be noted that even after SDP is enabled, the user may still perform a byte or page write to the AT28HC64BF. This is done by preceding the data to be written by the same 3-byte command sequence used to enable SDP. Once set, SDP remains active unless the disable command sequence is issued. Power transi- tions do not disable SDP, and SDP protects the AT28HC64BF during power-up and power- down conditions ...

Page 5

... MHz OUT -400 µA OH AT28HC64BF AT28HC64BF-120 -40°C - 85° ±10 High High Z V High Z IL Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device ...

Page 6

... ADDRESS VALID ACC HIGH after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT28HC64BF-120 Max Min Max 90 120 90 120 OUTPUT VALID . ACC ...

Page 7

... Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 3648A–PEEPR–10/ < Max Units AT28HC64BF Conditions OUT 7 ...

Page 8

... CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH 15. AC Write Waveforms 15.1 WE Controlled OE ADDRESS CE WE DATA IN 15.2 CE Controlled OE ADDRESS WE CE DATA IN AT28HC64BF 8 t OES OES ...

Page 9

... Chip Erase Waveforms µs (min (min 12.0 V ±0 3648A–PEEPR–10/06 (1)(2) t WPH VALID ADD t DS VALID DATA AT28HC64BF Min Max 100 150 50 t BLC Units µ ...

Page 10

... DATA Notes through A12 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered must be high only when WE and CE are both low. AT28HC64BF 10 20. Software Data Protection Disable Algorithm (2) ...

Page 11

... Beginning and ending state of I/O6 will vary. 3. Any address location may be used, but the address should not vary. 3648A–PEEPR–10/06 (1) See “AC Read Characteristics” on page 6. t OEH t OE (1) (1)(2)(3) t OEH AT28HC64BF Min Typ Max Min Typ Max 10 10 150 0 t ...

Page 12

... Normalized I Graphs CC AT28HC64BF 12 3648A–PEEPR–10/06 ...

Page 13

... Die Products Reference Section: Parallel EEPROM Die Products 3648A–PEEPR–10/06 Ordering Code AT28HC64BF-70JU AT28HC64BF-70PU AT28HC64BF-70SU AT28HC64BF-70TU AT28HC64BF-90JU AT28HC64BF-90PU AT28HC64BF-90SU AT28HC64BF-90TU AT28HC64BF-12JU AT28HC64BF-12PU AT28HC64BF-12SU AT28HC64BF-12TU Package Type Package and Temperature Combinations JU, PU, SU, TU JU, PU, SU, TU JU, PU, SU, TU AT28HC64BF Package Operation Range ...

Page 14

... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28HC64BF 14 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...

Page 15

... Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 3648A–PEEPR–10/06 D PIN 0º ~ 15º REF eB TITLE 28P6, 28-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP) AT28HC64BF E1 A1 COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM A – – A1 0.381 – D 36.703 – ...

Page 16

... SOIC Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. 2325 Orchard Parkway San Jose, CA 95131 R AT28HC64BF 16 0.51(0.020) 0.33(0.013) 7.60(0.2992) 7.40(0.2914) PIN 1 1.27(0.50) BSC TOP VIEW 18.10(0.7125) 17.70(0.6969) 0.30(0.0118) 0.10(0.0040) 0º ~ 8º 1.27(0.050) 0.40(0.016) TITLE 28S, 28-lead, 0.300" Body, Plastic Gull Wing Small Outline (SOIC) JEDEC Standard MS-013 10 ...

Page 17

... Orchard Parkway San Jose, CA 95131 R 3648A–PEEPR–10/06 PIN SEATING PLANE A1 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) AT28HC64BF 0º ~ 5º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – ...

Page 18

... Atmel Corporation. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 ...

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