AT28HC64B-120 ATMEL [ATMEL Corporation], AT28HC64B-120 Datasheet - Page 8
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AT28HC64B-120
Manufacturer Part Number
AT28HC64B-120
Description
64K 8K x 8 High Speed CMOS E2PROM with Page Write and Software Data Protection
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT28HC64B-120.pdf
(12 pages)
Software Protected Write Cycle Waveforms
Notes: 1. A6 through A12 must specify the same page address during each high to low transition of WE (or CE) after
Software Data
Protection Enable Algorithm
Notes for software program code:
1. Data Format: I/O7 - I/O0 (Hex);
2. Write Protect state will be activated at end of write even if no
3. Write Protect state will be deactivated at end of write period
4. 1 to 64-bytes of data are loaded.
2-274
Address Format: A12 - A0 (Hex).
other data is loaded.
even if no other data is loaded.
2. OE must be high only when WE and CE are both low.
the software code has been entered.
LOAD LAST BYTE
ADDRESS 0AAA
ANY ADDRESS
LAST ADDRESS
ADDRESS 1555
ADDRESS 1555
LOAD DATA AA
LOAD DATA XX
LOAD DATA 55
LOAD DATA A0
AT28HC64B
TO
TO
TO
TO
TO
(4)
WRITES ENABLED
ENTER DATA
PROTECT STATE
(1)
(2)
Software Data
Protection Disable Algorithm
(1, 2)
LOAD LAST BYTE
ANY ADDRESS
ADDRESS 0AAA
ADDRESS 0AAA
LAST ADDRESS
LOAD DATA AA
ADDRESS 1555
ADDRESS 1555
LOAD DATA AA
ADDRESS 1555
ADDRESS 1555
LOAD DATA XX
LOAD DATA 55
LOAD DATA 80
LOAD DATA 55
LOAD DATA 20
TO
TO
TO
TO
TO
TO
TO
TO
(4)
EXIT DATA
PROTECT STATE
(1)
(3)