AT25DF641A-MH-T ATMEL [ATMEL Corporation], AT25DF641A-MH-T Datasheet - Page 17

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AT25DF641A-MH-T

Manufacturer Part Number
AT25DF641A-MH-T
Description
64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Atmel AT25DF641A [Preliminary]
erase operation currently in progress will be suspended within a time of t
. The Program Sus-
SUSP
pend (PS) bit or the Erase Suspend (ES) bit in the Status Register will then be set to the logical
“1” state to indicate that the program or erase operation has been suspended. In addition, the
RDY/BSY bit in the Status Register will indicate that the device is ready for another operation.
The complete opcode must be clocked into the device before the CS pin is deasserted, and the
CS pin must be deasserted on an even byte boundary (multiples of eight bits); otherwise, no
suspend operation will be performed.
Read operations are not allowed to a 64-Kbyte sector that has had its program or erase opera-
tion suspended. If a read is attempted to a suspended sector, then the device will output
undefined data. Therefore, when performing a Read Array operation to an unsuspended sector
and the device’s internal address counter increments and crosses the sector boundary to a sus-
pended sector, the device will then start outputting undefined data continuously until the address
counter increments and crosses a sector boundary to an unsuspended sector.
A program operation is not allowed to a sector that has been erase suspended. If a program
operation is attempted to an erase suspended sector, then the program operation will abort and
the WEL bit in the Status Register will be reset back to the logical “0” state. Likewise, an erase
operation is not allowed to a sector that has been program suspended. If attempted, the erase
operation will abort and the WEL bit in the Status Register will be reset to a logical “0” state.
During an Erase Suspend, a program operation to a different 64-Kbyte sector can be started and
subsequently suspended. This results in a simultaneous Erase Suspend/Program Suspend con-
dition and will be indicated by the states of both the ES and PS bits in the Status Register being
set to the logical “1” state.
If a Reset operation (see
“Reset” on page
40) is performed while a sector is erase suspended,
the suspend operation will abort and the contents of the block in the suspended sector will be left
in an undefined state. However, if a Reset is performed while a sector is program suspended,
the suspend operation will abort but only the contents of the page that was being programmed
and subsequently suspended will be undefined. The remaining pages in the 64-Kbyte sector will
retain their previous contents.
If an attempt is made to perform an operation that is not allowed during a program or erase sus-
pend, such as a Protect Sector operation, then the device will simply ignore the opcode and no
operation will be performed. The state of the WEL bit in the Status Register, as well as the SPRL
(Sector Protection Registers Locked) and SLE (Sector Lockdown Enabled) bits, will not be
affected.
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8693A–DFLASH–8/10

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