24FC515 MICROCHIP [Microchip Technology], 24FC515 Datasheet - Page 5

• Manufacturer Part Number: 24FC515
• Description: 512K I2C CMOS Serial EEPROM
• Manufacturer: MICROCHIP [Microchip Technology]

2.0
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
2.1
The A0, A1 inputs are used by the 24XX515 for multiple
device operations. The levels on these inputs are
compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.
Up to four devices may be connected to the same bus
by using different Chip Select bit combinations. If left
unconnected, these inputs will be pulled down
internally to V
2.2
The A2 input is non-configurable Chip Select. This pin
must be tied to V
2.3
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to V
400 kHz and 1 MHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
 2003 Microchip Technology Inc.
Name PDIP SOIC
SDA
SCL
V
V
WP
A0
A1
A2
CC
SS
PIN DESCRIPTIONS
A0, A1 Chip Address Inputs
A2 Chip Address Input
Serial Data (SDA)
1
2
3
4
5
6
7
8
SS
CC
.
CC
1
2
3
4
5
6
7
8
PIN FUNCTION TABLE
(typical 10 k
in order for this device to operate.
User Configurable Chip Select
User Configurable Chip Select
Non-Configurable Chip Select.
This pin must be hard wired to
logical 1 state (V
will not operate with this pin
left floating or held to logical 0
(V
Ground
Serial Data
Serial Clock
Write-Protect Input
+1.8 to 5.5V (24AA515)
+2.5 to 5.5V (24LC515)
+4.5 to 5.5V (24FC515)
SS
).
for 100 kHz, 2 k
Function
CC
). Device
24AA515/24LC515/24FC515
Preliminary
for
2.4
This input is used to synchronize the data transfer from
and to the device.
2.5
This pin can be connected to either V
floating. An internal pull-down resistor on this pin will
keep this device in the unprotected state if left floating.
If tied to V
is enabled (read/write the entire memory 0000h-
FFFFh).
If tied to V
operations are not affected.
3.0
The 24XX515 supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus must be
controlled by a master device which generates the
serial clock (SCL), controls the bus access, and
generates the Start and Stop conditions while the
24XX515 works as a slave. Both master and slave can
operate as a transmitter or receiver, but the master
device determines which mode is activated.
Serial Clock (SCL)
Write-Protect (WP)
FUNCTIONAL DESCRIPTION
SS
CC
or left floating, normal memory operation
, write operations are inhibited. Read
DS21673C-page 5
SS
, V
CC
or left