AT49BV802AT ATMEL [ATMEL Corporation], AT49BV802AT Datasheet - Page 2

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AT49BV802AT

Manufacturer Part Number
AT49BV802AT
Description
8-megabit (512K x 16/ 1M x 8) 3-volt Only Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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2
RDY/BUSY
AT49BV802A(T)
RESET
A15
A14
A13
A12
A11
A10
A18
A17
WE
NC
NC
NC
NC
A9
A8
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TSOP Top View
Type 1
The device powers on in the read mode. Command sequences are used to place the device in
other operation modes such as program and erase. The device has the capability to protect
the data in any sector (see “Sector Lockdown” section).
To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend
feature. This feature will put the erase or program on hold for any amount of time and let the
user read data from or program data to any of the remaining sectors within the memory. The
end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by
the toggle bit.
A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement
of entering the three-byte program sequence is offered to further improve programming time.
After entering the six-byte code, only single pulses on the write control lines are required for
writing into the device. This mode (Single Pulse Byte/Word Program) is exited by powering
down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing
it back to V
not work while in this mode; if entered they will result in data being programmed into the
device. It is not recommended that the six-byte code reside in the software of the final product
but only exist in external programming code.
The BYTE pin controls whether the device data I/O pins operate in the byte or word configura-
tion. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 - I/O15 are
active and controlled by CE and OE.
If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins
I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-
stated, and the I/O15 pin is used as an input for the LSB (A-1) address function.
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
CC
. Erase, Erase Suspend/Resume and Program Suspend/Resume commands will
A16
BYTE
GND
I/O15/A-1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
OE
GND
CE
A0
C
D
G
H
A
B
E
F
VSS
CE
OE
A3
A4
A2
A1
A0
CBGA Top View
1
(Ball Down)
A17
I/O0
I/O8
I/O9
I/O1
A7
A6
A5
2
RDY/BUSY
I/O10
I/O11
A18
I/O2
I/O3
NC
NC
3
I/O12
VCC
4
RST
I/O5
I/O4
WE
NC
NC
I/O14
I/O13
5
A10
A11
I/O7
I/O6
A9
A8
I/015/A-1
BYTE
VSS
6
A13
A12
A14
A15
A16
3405C–FLASH–9/04

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