24C64_1 ESTEK [Estek Electronics Co. Ltd], 24C64_1 Datasheet - Page 4

• Manufacturer Part Number: 24C64_1
• Description: available in space-saving 8-lead PDIP, 8-lead SOP, and 8-lead TSSOP packages
• Manufacturer: ESTEK [Estek Electronics Co. Ltd]

CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (see to Figure 1 on page 4). Data changes during SCL high periods
will indicate a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other
command (see to Figure 2 on page 4).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop
command will place the EEPROM in a standby power mode (see Figure 2 on page 4).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a "0" to acknowledge that it has received each word. This happens during the ninth clock cycle.
STANDBY MODE: The
(b) after the receipt of the STOP bit and the completion of any internal operations
MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part can be reset by
following these steps:
1.
2.
3.
¡
¡
Device Operation
Figure 1: Data Validity
Figure 2: Start and Stop Definition
Clock up to 9 cycles.
Look for SDA high in each cycle while SCL is high.
Create a start condition.
SDA
SCL
SDA
SCL
24C32/ 24C64 features a low-power standby mode which is enabled: (a) upon power-up and
START
DATA STABLE
CHANGE
4
DATA
DATA STABLE
STOP
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 / 24C64