AT24C1024-10PU-2.7 ATMEL [ATMEL Corporation], AT24C1024-10PU-2.7 Datasheet

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AT24C1024-10PU-2.7

Manufacturer Part Number
AT24C1024-10PU-2.7
Description
Two-wire Serial EEPROM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Description
The AT24C1024 provides 1,048,576 bits of serial electrically erasable and program-
mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The
device’s cascadable feature allows up to two devices to share a common two-wire bus.
The device is optimized for use in many industrial and commercial applications where
low-power and low-voltage operation are essential. The devices are available in
space-saving 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead Leadless Array (LAP) and 8-lead
SAP packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V)
versions.
Table 1. Pin Configurations
Pin Name
SDA
SCL
WP
NC
A1
Low-voltage Operation
Internally Organized 131,072 x 8
Two-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400 kHz (2.7V) and 1 MHz (5V) Clock Rate
Write Protect Pin for Hardware and Software Data Protection
256-byte Page Write Mode (Partial Page Writes Allowed)
Random and Sequential Read Modes
Self-timed Write Cycle (5 ms Typical)
High Reliability
8-lead PDIP, 8-lead EIAJ SOIC, 8-lead LAP and 8-lead SAP Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Die
– 2.7 (V
– Endurance: 100,000 Write Cycles/Page
– Data Retention: 40 Years
CC
GND
NC
NC
A1
= 2.7V to 5.5V)
8-lead SOIC
1
2
3
4
Function
Address Input
Serial Data
Serial Clock Input
Write Protect
No Connect
8
7
6
5
VCC
WP
SCL
SDA
GND
8-lead Leadless Array
VCC
SDA
SCL
NC
NC
WP
A1
VCC
SDA
SCL
WP
Bottom View
8-lead PDIP
Bottom View
8
7
6
5
8-lead SAP
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
NC
A1
NC
GND
NC
A1
NC
GND
VCC
WP
SCL
SDA
Two-wire Serial
EEPROM
1M (131,072 x 8)
AT24C1024
Rev. 1471N–SEEPR–12/05
1

Related parts for AT24C1024-10PU-2.7

AT24C1024-10PU-2.7 Summary of contents

Page 1

... Die Sales: Wafer Form, Waffle Pack and Bumped Die Description The AT24C1024 provides 1,048,576 bits of serial electrically erasable and program- mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device’s cascadable feature allows up to two devices to share a common two-wire bus. ...

Page 2

... Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 1. Block Diagram AT24C1024 2 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...

Page 3

... V necting the pin to GND. Switching write-protect function. Memory AT24C1024, 1024K SERIAL EEPROM: The 1024K is internally organized as 512 pages of 256 bytes each. Random word addressing requires a 17-bit data word address. Organization 1471N–SEEPR–12/05 plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the A1 pin to CC plane is < ...

Page 4

... Input Low Level IL (1) V Input High Level IH V Output Low Level OL Note min and V max are reference only and are not tested AT24C1024 4 = 25° 1.0 MHz –40°C to +85° Test Condition V = 5.0V READ at 400 kHz 5.0V WRITE at 400 kHz ...

Page 5

... V CC 4.5V ≤ (2) 2.7V ≤ 4.5V ≤ 2.7V ≤ 4.5V ≤ 2.7V ≤ 4.5V ≤ 2.7V ≤ 4.5V ≤ 2.7V ≤ 0 AT24C1024 = +2.7V to +5.5V Min Max ≤ 5.5V 1000 ≤ 5.5V 400 ≤ 5.5V 0.4 ≤ 5.5V 1.3 ≤ 5.5V 0.4 ≤ 5.5V 0.6 ≤ 5.5V 0.05 0.55 ≤ 5.5V 0.05 0.9 ≤ 5.5V 0.5 ≤ 5.5V 1.3 ≤ 5.5V 0.25 ≤ ...

Page 6

... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C1024 features a low-power standby mode which is enabled: a) upon power-up and b) after the receipt of the stop bit and the completion of any internal operations ...

Page 7

... Figure 3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. WR Figure 4. Data Validity 1471N–SEEPR–12/05 ® ) ACK t wr STOP CONDITION AT24C1024 (1) START CONDITION 7 ...

Page 8

... Upon a compare of the device address, the EEPROM will output a zero compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C1024 has a hardware data protection scheme that allows the user to write-protect the entire memory when the WP pin ...

Page 9

... Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the read or write sequence to continue. 1471N–SEEPR–12/05 bit of the device address, then the most significant 0 bit and two 8-bit data word addresses following the device the nonvolatile memory. All inputs are disabled during WR AT24C1024 9 ...

Page 10

... The sequential read operation is terminated when the microcontroller does not respond with a zero, but does generate a following stop condition (see Figure 12 on page 12). AT24C1024 10 1471N–SEEPR–12/05 ...

Page 11

... Figure 7. Device Address Figure 8. Byte Write Figure 9. Page Write P 0 Figure 10. Current Address Read 1471N–SEEPR–12/05 0 MOST LEAST SIGNIFICANT SIGNIFICANT P 0 MOST LEAST SIGNIFICANT SIGNIFICANT AT24C1024 11 ...

Page 12

... Figure 11. Random Read P 0 Figure 12. Sequential Read High Byte ADDRESS P 0 AT24C1024 12 High Byte Low Byte ADDRESS ADDRESS Low Byte ADDRESS Data Data Data 1471N–SEEPR–12/05 ...

Page 13

... Ordering Information Ordering Code (2) AT24C1024C1-10CU-2.7 (2) AT24C1024-10PU-2.7 (2) AT24C1024W-10SU-2.7 (2) AT24C1024Y4-10YU-2.7 (3) AT24C1024-W2.7-11 Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics tables. 2. “U” designates Green Package & RoHS compliant. 3. Available in waffle pack and wafer form; order as SL788 for wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing ...

Page 14

... Marked Pin1 Indentifier E 0.10 mm TYP Bottom View Note: 1. Metal Pad Dimensions. 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024 14 D Top View Pin1 Corner TITLE 8CN1, 8-lead ( 1.04 mm Body), Lead Pitch 1.27 mm, Leadless Array Package (LAP) ...

Page 15

... Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R 1471N–SEEPR–12/ TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) AT24C1024 End View COMMON DIMENSIONS (Unit of Measure = inches) MIN NOM MAX SYMBOL A – – 0.210 A2 ...

Page 16

... It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. 5. Values b and C apply to pb/Sn solder plated terminal. The standard thickness of the solder layer shall be 0.010 +0.010/−0.005 mm. 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024 ∅ End View ...

Page 17

... Colorado Springs, CO 80906 R 1471N–SEEPR–12/05 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 D 5.80 E 4.70 D1 2.85 E1 2. 0.50 TITLE 8Y4, 8-lead (6.00 x 4.90 mm Body) SOIC Array Package (SAP) Y4 AT24C1024 NOM MAX NOTE – 0.90 – 0.05 6.00 6.20 4.90 5.10 3.00 3.15 3.00 3.15 0.40 0.45 1.27 TYP 3.81 REF 0.60 0.70 DRAWING NO. 8Y4 5/24/04 REV ...

Page 18

... Atmel Corporation 2005. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 ...

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