AT24C04A ATMEL [ATMEL Corporation], AT24C04A Datasheet
AT24C04A
Available stocks
Related parts for AT24C04A
AT24C04A Summary of contents
Page 1
... VCC SCL 3 6 GND SDA 4 5 8-lead TSSOP VCC SCL GND 4 5 SDA Two-wire Serial EEPROM Extended Temperature 2K (256 (512 (1024 x 8) 16K (2048 x 8) AT24C02A AT24C04A AT24C08A AT24C16A 5083A–SEEPR–9/04 1 ...
Page 2
... Device Addressing, page 9). The AT24C04A uses the A2 and A1 inputs for hardwire addressing, and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no-connect. Stresses beyond those listed under “Absolute Maximum Ratings” ...
Page 3
... AT24C02A, 2K SERIAL EEPROM: The 2K is internally organized with 32 pages of 8 bytes each. Random word addressing requires an 8-bit data word address. AT24C04A, 4K SERIAL EEPROM: The 4K is internally organized with 32 pages of 16 bytes each. Random word addressing requires a 9-bit data word address. AT24C08A, 8K SERIAL EEPROM: The 8K is internally organized with 64 pages of 16 bytes each ...
Page 4
Table 3. DC Characteristics Applicable over recommended operating range from: T (unless otherwise noted) Symbol Parameter V Supply Voltage CC3 I Supply Current Supply Current Standby Current V ...
Page 5
Table 4. AC Characteristics Applicable over recommended operating range from T 100 pF (unless otherwise noted). Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High HIGH t Noise Suppression Time I ...
Page 6
Device Operation AT24C02A/04A/08A/16A 6 CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter- nal device. Data on the SDA pin may change only during SCL low time periods (see Figure 2). Data changes during SCL ...
Page 7
... MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part can be reset by following these steps: Figure 4. Bus Timing Figure 5. Write Cycle Timing SCL SDA 8th BIT WORDn Note: The write cycle time t is the time from a valid stop condition of a write sequence to the end of the interval clear/write cycle. ...
Page 8
AT24C02A/04A/08A/16A 8 Figure 6. Output Acknowledge 5083A–SEEPR–9/04 ...
Page 9
... These three bits must compare to their corresponding hardwired input pins. The 4K EEPROM only uses the A2 and A1 device address bits with the third bit being a memory page address bit. The two device address bits must compare to their corre- sponding hardwired input pins. The A0 pin is no-connect. ...
Page 10
... The data word address lower three (2K) or four (4K, 8K, 16K) bits are internally incre- mented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than eight (2K) or sixteen (4K, 8K, 16K) data words are transmitted to the EEPROM, the data word address will “ ...
Page 11
... The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the cur- rent page to the first byte of the same page. Once the device address with the read/write select bit set to “ ...
Page 12
Figure 12. Sequential Read AT24C02A/04A/08A/16A 12 microcontroller does not respond with a “0” but does generate a following stop condition, as shown in Figure 12. 5083A–SEEPR–9/04 ...
Page 13
AT24C02A Ordering Information Ordering Code AT24C02A-10PE-2.7 AT24C02AN-10SE-2.7 AT24C02A-10PQ-2.7 AT24C02AN-10SQ-2.7 AT24C02A-10TQ-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables (Table 3 on page 4 and Table ...
Page 14
... AT24C04A Ordering Information Ordering Code AT24C04A-10PE-2.7 AT24C04AN-10SE-2.7 AT24C04A-10TE-2.7 AT24C04A-10PQ-2.7 AT24C04A-10TQ-2.7 AT24C04AN-10SQ-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables (Table 3 on page 4 and Table 4 on page 5). 8P3 8-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" ...
Page 15
AT24C08A Ordering Information Ordering Code AT24C08A-10PE-2.7 AT24C08AN-10SE-2.7 AT24C08A-10PQ-2.7 AT24C08AN-10SQ-2.7 AT24C08AN-10TQ-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables (Table 3 on page 4 and Table ...
Page 16
AT24C16A Ordering Information Ordering Code AT24C16A-10PE-2.7 AT24C16AN-10SE-2.7 AT24C16A-10PQ-2.7 AT24C16AN-10SQ-2.7 AT24C16A-10TQ-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table (Table 3 on page 4 and Table ...
Page 17
Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are measured ...
Page 18
JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R ...
Page 19
TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...
Page 20
... Atmel Corporation 2004. All rights reserved. Atmel is a trademark of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 ...