HD151BF854_06 RENESAS [Renesas Technology Corp], HD151BF854_06 Datasheet - Page 4

• Manufacturer Part Number: HD151BF854_06
• Description: 2.5 V PLL Clock Buffer for DDR Applicationjpeg
• Manufacturer: RENESAS [Renesas Technology Corp]

HD151BF854
Recommended Operating Conditions
Supply voltage
Output supply voltage
DC input signal voltage
High level input voltage
High level input voltage
Low level input voltage
Output differential cross point voltage
Output current
Input clock slew rate
Operating temperature
Note: Unused inputs must be held high or low to prevent them from floating.
Electrical Characteristics
Input clamp voltage
(All inputs)
Output voltage
Input current
Analog supply current
Dynamic supply current
Input capacitance*
Delta input capacitance*
Notes: 1. For conditions shown as Min or Max, use the appropriate value specified under recommended operating
Rev.5.00 Apr 07, 2006 page 4 of 7
2. Target of design, not 100% tested in production.
conditions.
Item
Item
2
2
Symbol
DI
AI
V
V
C
V
C
I
OH
OL
IK
CC
CC
I
Di
I
Symbol
AVDD
VDD–0.2
VDD
V
–0.25
V
V
SR
V
I
I
T
OH
Min
–10
OL
1.7
2.5
OX
—
—
—
—
—
IH
IH
IL
a
0.5 VDD
–0.3
–0.3
–0.2
Min
Typ *
2.3
2.3
1.7
1.7
—
—
1
0
250
—
—
—
—
—
—
—
—
—
1
Typ
2.5
2.5
—
—
—
—
—
—
—
—
—
VDD
Max
–1.2
0.25
300
0.2
0.6
3.5
—
10
12
VDD+0.3
VDD+0.3
0.5 VDD
Max
+0.2
–12
2.7
2.7
3.6
0.7
12
70
—
Unit
mA
mA
pF
pF
V
V
A
I
I
I
I
I
V
VDD = 2.7 V, CLKIN, FBIN
VDD = AVDD = 2.7 V,
170 MHz
VDD = AVDD = 2.7 V, 170 MHz,
All Yn, Yn, = open
CLKIN and FBIN
Unit
V/ns
I
OH
OH
OL
OL
mA
I
°
= –18 mA, VDD = 2.3 V
V
V
V
V
V
V
V
C
= 0 V or 2.7 V,
= 100 µA, VDD = 2.3 to 2.7 V
= 12 mA, VDD = 2.3 V
= –100 µA, VDD = 2.3 to 2.7 V
= –12 mA, VDD = 2.3 V
All pins
CLKIN
FBIN
CLKIN, FBIN
Test Conditions
Conditions