MAX8550-MAX8551 MAXIM [Maxim Integrated Products], MAX8550-MAX8551 Datasheet - Page 14
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MAX8550-MAX8551
Manufacturer Part Number
MAX8550-MAX8551
Description
Integrated DDR Power-Supply Solutions for Desktops, Notebooks, and Graphic Cards
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
1.MAX8550-MAX8551.pdf
(29 pages)
light-load efficiency are made by varying the inductor
value. Generally, low inductor values produce a broad-
er efficiency vs. load curve, while higher values result in
higher full-load efficiency (assuming that the coil resis-
tance remains fixed) and less output voltage ripple.
Penalties for using higher inductor values include larger
physical size and degraded load-transient response,
especially at low input-voltage levels.
DC output accuracy specifications refer to the thresh-
old of the error comparator. When the inductor is in
continuous conduction, the MAX8550/MAX8551 regu-
late the valley of the output ripple, so the actual DC out-
put voltage is higher than the trip level by 50% of the
output ripple voltage. In discontinuous conduction
(SKIP = GND and I
age has a DC regulation level higher than the error-
comparator threshold by approximately 1.5% due to
slope compensation.
The low-noise forced-PWM mode (SKIP = AV
ables the zero-crossing comparator, which controls the
low-side switch on-time. This forces the low-side gate-
drive waveform to constantly be the complement of the
high-side gate-drive waveform, so the inductor current
reverses at light loads while DH maintains a duty factor
of V
frequency fairly constant. However, forced-PWM opera-
tion comes at a cost where the no-load V
rent remains between 2mA and 20mA due to the
external MOSFET’s gate charge and switching frequen-
cy. Forced-PWM mode is most useful for reducing
audio frequency noise, improving load-transient
response, and providing sink-current capability for
dynamic output-voltage adjustment.
The current-limit circuit for the buck regulator portion of
the MAX8550/MAX8551 employs a unique “valley” cur-
rent-sensing algorithm that senses the voltage drop
across LX and PGND1 and uses the on-resistance of
the rectifying MOSFET (Q2 in the Typical Applications
Circuit, Figure 8) as the current-sensing element. If the
magnitude of the current-sense signal is above the val-
ley current-limit threshold, the PWM controller is not
allowed to initiate a new cycle (Figure 4). With valley
Integrated DDR Power-Supply Solutions for
Desktops, Notebooks, and Graphic Cards
14
OUT
______________________________________________________________________________________
/ V
Current-Limit Buck Regulator (ILIM)
Forced-PWM Mode ( SKIP = AV
IN
. Forced-PWM mode keeps the switching
LOAD
< I
LOAD(SKIP)
Valley Current Limit
MAX8550 Only)
), the output volt-
DD
bias cur-
DD
DD
) dis-
in
current-limit sensing, the actual peak current is greater
than the valley current-limit threshold by an amount
equal to the inductor current ripple. Therefore, the exact
current-limit characteristic and maximum load capability
are a function of the current-sense resistance, inductor
value, and input voltage. When combined with the
undervoltage-protection circuit, this current-limit method
is effective in almost every circumstance.
In forced-PWM mode, the MAX8550/MAX8551 also
implement a negative current limit to prevent excessive
reverse inductor currents when the buck regulator output
is sinking current. The negative current-limit threshold is
set to approximately 120% of the positive current limit
and tracks the positive current limit when V
ed. The current-limit threshold is adjusted with an exter-
nal resistor-divider at ILIM. A 2µA to 20µA divider current
is recommended for accuracy and noise immunity.
The current-limit threshold adjustment range is from
25mV to 200mV. In the adjustable mode, the current-
limit threshold voltage (from PGND1 to LX) is precisely
1/10th the voltage seen at ILIM. The threshold defaults
to 50mV when ILIM is connected to AV
threshold for switchover to the 50mV default value is
approximately AV
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the differ-
ential current-sense signals seen between LX and GND.
Figure 2. Pulse-Skipping/Discontinuous Crossover Point
0
∆I
∆t
ON-TIME
=
V
IN
- V
L
DD
OUT
- 1V.
TIME
DD
ILIM
I
I
PEAK
LOAD
. The logic
is adjust-
= I
PEAK
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