74AUP1G11 NXP [NXP Semiconductors], 74AUP1G11 Datasheet
74AUP1G11
Related parts for 74AUP1G11
74AUP1G11 Summary of contents
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... Low-power 3-input AND gate Rev. 01 — 4 September 2007 1. General description The 74AUP1G11 provides a low-power, low-voltage single 3-input AND gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V This device ensures a very low static and dynamic power consumption across the entire V range from 0 ...
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... Ordering information Type number Package Temperature range Name 74AUP1G11GW +125 C 74AUP1G11GM +125 C 74AUP1G11GF +125 C 4. Marking Table 2. Marking Type number 74AUP1G11GW 74AUP1G11GM 74AUP1G11GF 5. Functional diagram 001aac033 Fig 1. Logic symbol 74AUP1G11_1 Product data sheet Description SC-88 plastic surface-mounted package ...
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... 001aag918 Transparent top view Fig 5. Pin configuration SOT886 (XSON6 Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate 74AUP1G11 GND 001aag919 Transparent top view Fig 6. Pin configuration SOT891 (XSON6) ...
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... Active mode and Power-down mode +125 C amb derates linearly with 4.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Power-down mode 0 3 Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate Min Max 0.5 +4 [1] 0.5 +4 [1] 0.5 +4 ...
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... GND GND GND Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate Min Typ Max ...
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... GND Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate Min Typ Max ...
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... 3 0 GND GND. CC Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate Min Typ Max ...
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... [2] Figure Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate Figure +125 C [1] Typ Max Min ( 18 3.0 5.6 9.5 2.8 2.3 3.9 5.9 2.2 1.9 3.1 4.8 1.8 1.6 2.5 3 ...
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... where input V M GND t PHL output Table 9. Input 0 Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate +125 C [1] Typ Max Min Max ( ...
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... V EXT [ PLH open = for measuring propagation delays, setup and hold times and pulse width R L Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate V EXT PHL PZH PHZ PZL ...
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... scale 2.2 1.35 2.2 1.3 0.65 1.8 1.15 2.0 REFERENCES JEDEC JEITA SC-88 Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate detail 0.45 0.25 0.2 0.2 0.1 0.15 0.15 EUROPEAN PROJECTION SOT363 ISSUE DATE 04-11-08 06-03-16 © ...
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... Product data sheet scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate 4 ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2007. All rights reserved ...
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... Product data sheet scale 1.05 0.35 0.40 0.55 0.35 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate SOT891 4 ( EUROPEAN ISSUE DATE PROJECTION 05-04-06 07-05-15 © NXP B.V. 2007. All rights reserved ...
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... Machine Model 15. Revision history Table 12. Revision history Document ID Release date 74AUP1G11_1 20070904 74AUP1G11_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate Supersedes - © NXP B.V. 2007. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 4 September 2007 74AUP1G11 Low-power 3-input AND gate © NXP B.V. 2007. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 4 September 2007 Document identifier: 74AUP1G11_1 ...