ML6431CH MICRO-LINEAR [Micro Linear Corporation], ML6431CH Datasheet - Page 17

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ML6431CH

Manufacturer Part Number
ML6431CH
Description
Genlocking Sync Generator with Digital Audio Clock for NTSC, PAL & VGA
Manufacturer
MICRO-LINEAR [Micro Linear Corporation]
Datasheet

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Part Number:
ML6431CH
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FUNCTIONAL DESCRIPTION
Audio Clock: The Ml6430/ML6431 outputs a clock at
32kHz, 44.1kHz, or 48kHz. This clock is locked in
frequency to the basic video clock regardless of the
standard being used. With VCR head switches, the phase
correction required to track the timing is removed from
the audio clock by a patented circuit. This prevents the
audio clock from being modulated by step changes in
video timing. See the Table 9 for the audio clock rates
supported and how they are derived internally.
ADDITIONAL CONTROL REGISTERS (ML6431 ONLY)
DisAutoVCR:
PHERROUT:
VIDEO STANDARD
CCIR601 NTSC
CCIR601 NTSC
CCIR601 NTSC
CCIR601 PAL
CCIR601 PAL
CCIR601 PAL
NTSC Square Pixel
NTSC Square Pixel
NTSC Square Pixel
PAL Square Pixel
PAL Square Pixel
PAL Square Pixel
NTSC 4xFSC
NTSC 4xFSC
NTSC 4xFSC
PAL 4xFSC
PAL 4xFSC
PAL 4xFSC
Disables the auto VCR detect circuit.
Register 7, Bit 0: DisAutoVCR
MUX phase error signal onto
AUDIOCLK/PHERROUT pin.
Register 7, Bit 3: PHERROUT enable
AUDIO RATE
48kHz
44.1kHz
32kHz
48kHz
44.1kHz
32kHz
48kHz
44.1kHz
32kHz
48kHz
44.1kHz
32kHz
48kHz
44.1kHz
32kHz
48kHz
44.1kHz
32kHz
Table 9. Audio Clock Generation (ML6430/ML6431)
(Continued)
(96000 ÷ 27MHz)
(88200 ÷ 27MHz)
(64000 ÷ 27MHz)
(96000 ÷ 27MHz)
(88200 ÷ 27MHz)
(64000 ÷ 27MHz)
(105600 ÷ 27MHz)
(97020 ÷ 27MHz)
(70400 ÷ 27MHz)
(96000 ÷ 29.5MHz)
(88200 ÷ 29.5MHz)
(64000 ÷ 29.5MHz)
(105600 ÷ 31.5MHz)
(92400 ÷ 30MHz)
(70400 ÷ 31.5MHz)
(76800 ÷ 28.37MHz)
(70560 ÷ 28.37MHz)
(51200 ÷ 28.37MHz)
AUDIO/PIXEL CLOCK RATIO
This bit controls the source of AUDIOCLK/PHERROUT.
When this bit is low, AUDIOCLK/PHERROUT provides the
audio clock output. When this bit is high, AUDIOCLK/
PHERROUT provides the 1-bit digital phase error of each
Hsync edge.
Additionally, when both PHERROUT enable and VGA bits
are logic high, the reset point of the pixel counter is
changed from 512 to 256. This changes the equation for
calculating the number of pixels per line verses the Pixel
Counter bits to the following:
P[10:0] = 2
13.5MHz
13.5MHz
13.5MHz
13.5MHz
13.5MHz
13.5MHz
12.27MHz
12.27MHz
14.32MHz
12.27MHz
14.75MHz
14.75MHz
14.75MHz
14.32MHz
14.32MHz
17.72MHz
17.72MHz
17.72MHz
(number of pixels per line) – 512
ML6430/ML6431
AUDIO/FRAME RATE RATIO
(8008 ÷ 5)
(147147 ÷ 100)
(16016 ÷ 15)
(1920)
(1764)
(1280)
(8008 ÷ 5)
(147147 ÷ 100)
(16016 ÷ 15)
(1920)
(1764)
(1280)
(8008 ÷ 5)
(147147 ÷ 100)
(16016 ÷ 15)
(1920)
(1764)
(1280)
25Hz
25Hz
25Hz
25Hz
25Hz
25Hz
25Hz
25Hz
25Hz
29.97Hz
29.97Hz
29.97Hz
29.97Hz
29.97Hz
29.97Hz
29.97Hz
29.97Hz
29.97Hz
(2)
17

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