LMC662AMD NSC [National Semiconductor], LMC662AMD Datasheet - Page 7

• Manufacturer Part Number: LMC662AMD
• Description: CMOS Dual Operational Amplifier
• Manufacturer: NSC [National Semiconductor]

Application Hints
margin
lower-frequency circuit operation. Thus, larger values of ca-
pacitance can be tolerated without oscillation. Note that in all
cases, the output will ring heavily when the load capacitance
is near the threshold for oscillation.
Capacitive load driving capability is enhanced by using a pull
up resistor to V
ducting 500 µA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be de-
termined based on the current sinking capability of the ampli-
fier with respect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see Electrical Characteristics).
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC662, typically less
than 0.04 pA, it is essential to have an excellent layout. For-
tunately, the techniques for obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC662’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs. See Figure
5 . To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of an input. This
would cause a 100 times degradation from the LMC662’s ac-
tual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current, or perhaps a minor
(2:1) degradation of the amplifier’s performance. See Fig-
FIGURE 3. Rx, Cx Improve Capacitive Load Tolerance
FIGURE 4. Compensating for Large Capacitive Loads
to
a
+
with a Pull Up Resistor
Figure 4 . Typically a pull up resistor con-
safe
value
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interfering
, which is nor-
11
would
with
7
ures 6, 7, 8 for typical connections of guard rings for stan-
dard op-amp configurations. If both inputs are active and at
high impedance, the guard can be tied to ground and still
provide some protection; see Figure 9 .
FIGURE 7. Guard Ring Connections: Non-Inverting
FIGURE 6. Guard Ring Connections: Inverting
FIGURE 8. Guard Ring Connections: Follower
FIGURE 5. Example, using the LMC660,
of Guard Ring in P.C. Board Layout
Amplifier
Amplifier
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