LMH7322_0706 NSC [National Semiconductor], LMH7322_0706 Datasheet - Page 12
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LMH7322_0706
Manufacturer Part Number
LMH7322_0706
Description
Dual 700 ps High Speed Comparator with RSPECL Outputs
Manufacturer
NSC [National Semiconductor]
Datasheet
1.LMH7322_0706.pdf
(24 pages)
www.national.com
t
t
t
t
t
t
t
t
t
Δt
Δt
ΔtP
t
t
t
t
t
PDH
PDL
PDLH
PDHL
PD
PDHd
OD-disp
SR-disp
CM-disp
r
f
s
h
PD-LE
LE
/ t
LE
/ t
PDLH
PD
fd
Dd
rd
resp t
resp t
resp t
Symbol
resp Δt
PDH
PDL
PDLd
PDHL
Propagation Delay
Input Overdrive Dispersion
Input Slew Rate Dispersion
Input Common Mode Dispersion Change in t
Q to Q Time Skew
Average Q to Q Time Skew
Average Diff. Time Skew
Output Rise Time (20% - 80%)
Output Fall Time (20% - 80%)
Latch Setup Time
Latch Hold Time
Latch to Output Delay Time
Text
signal crosses the switching level H to L and the moment the output signal
crosses 50% of the falling edge of Q output (t
Delay time between the moment the input signal crosses the switching
level L to H and the moment the output signal crosses 50% of the rising
edge of Q output (t
Delay time between the moment the input signal crosses the switching
level L to H and the moment the output signal crosses 50% of the falling
edge of Q output (t
crosses the switching level H to L and the moment the output signal
crosses 50% of the rising edge of Q output (t
Average of t
Average of t
Average of t
Delay time between the moment the input signal crosses the switching
level L to H and the zero crossing of the rising edge of the differential
output signal (t
crosses the switching level H to L and the zero crossing of the falling edge
of the differential output signal (t
Change in t
Change in t
Time skew between 50% levels of the rising edge of Q output and the
falling edge of output (Δt
edge of Q output and rising edge of Q output (Δt
Average of t
Average of t
Time needed for the (single ended or differential) output voltage to change
from 20% of its nominal value to 80%.
Time needed for the (single ended or differential) output voltage to change
from 80% of its nominal value to 20%.
Time the input signal has to be stable before enabling the latch
functionality.
Time the input signal has to remain stable after enabling the latch
functionality.
Delay time between the moment the latch input crosses the switching
level H to L and the moment the differential output signal crosses the 50%
level.
Note: input signal is opposite to output signal when latch becomes
enabled.
12
PD
PD
PD
PDH
PDL
PDLH
PDLH
PDHd
for different overdrive voltages at the input pins.
for different slew rates at the input pins.
for different common mode voltages at the input pins.
PDHd
and t
and t
and t
and t
and t
PDL
PDH
), or delay time between the moment the input signal
PDH
), or delay time between the moment the input signal
PDL
), or Delay time between the moment the input
PDHL
PDHL
PDLd
PDLH
.
.
.
for L to H and H to L transients.
for L to H and H to L transients.
), or time skew between 50% levels of falling
Description
PDLd
).
PDH
PDL
).
PDHL
).
).