LPV7215MFX INTERSIL [Intersil Corporation], LPV7215MFX Datasheet - Page 13
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LPV7215MFX
Manufacturer Part Number
LPV7215MFX
Description
Micropower, CMOS Input, RRIO, 1.8V, Push-Pull Output Comparator
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.LPV7215MFX.pdf
(18 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPV7215MFX
Manufacturer:
TI/德州仪器
Quantity:
20 000
CAPACITIVE AND RESISTIVE LOADS
The propagation delay is not affected by capacitive loads at
the output of the LPV7215. However, resistive loads slightly
affect the propagation delay on the falling edge by a reduction
of almost 2 µs depending on the load resistance value.
NOISE
Most comparators have rather low gain. This allows the output
to spend time between high and low when the input signal
changes slowly. The result is that the output may oscillate
between high and low when the differential input is near zero.
The exceptionally high gain of this comparator, 120 dB, elim-
inates this problem. Less than 1 µV of change on the input will
drive the output from one rail to the other rail. If the input signal
is noisy, the output cannot ignore the noise unless some hys-
teresis is provided by positive feedback. (See section on
adding hysteresis.)
LAYOUT/BYPASS CAPACITORS
Proper grounding and the use of a ground plane will help to
ensure the specified performance of the LPV7215. Minimizing
trace lengths, reducing unwanted parasitic capacitance and
using surface-mount components will also help.
Comparators are very sensitive to input noise. To minimize
supply noise, power supplies should be capacitively decou-
pled by a 0.01 µF ceramic capacitor in parallel with a 10 µF
electrolytic capacitor.
HYSTERESIS
In order to improve propagation delay when low overdrive is
needed hysteresis can be added.
FIGURE 3. Inverting Comparator with Hysteresis
13
INVERTING COMPARATOR WITH HYSTERESIS
The inverting comparator with hysteresis requires a three re-
sistor network that is referenced to the supply voltage V
the comparator as shown in Figure 3. When V
ing input is less than V
of the comparator (V
simplicity assume V
work resistors can be represented as R
R
The lower input trip voltage V
When V
close to ground. In this case the three network resistors can
be presented as R
The upper trip voltage V
The total hysteresis provided by the network is defined as
ΔV
2
.
A
= V
IN
A1
is greater than V
- V
V
A2
A2
V
A1
= V
2
//R
O
= V
CC
IN
switches as high as V
A
3
, the voltage at the non-inverting node
CC
< V
(R
in series with R
A2
R
2
A
is defined as
//R
A
2
, the output voltage is low or very
20123634
), the output voltage is high (for
/ ((R
A1
3
) / ((R
is defined as
1
//R
1
3
+ (R
) + R
1
.
1
2
//R
//R
2
+
)
). The three net-
3
3
IN
)
in series with
at the invert-
www.national.com
+
of