ADCMP551_0410 AD [Analog Devices], ADCMP551_0410 Datasheet - Page 7
![no-image](/images/no-image-200.jpg)
ADCMP551_0410
Manufacturer Part Number
ADCMP551_0410
Description
Single-Supply, High Speed PECL/LVPECL Comparators
Manufacturer
AD [Analog Devices]
Datasheet
1.ADCMP551_0410.pdf
(16 pages)
ADCMP551
12
13
15
16
ADCMP552
15
16
18
19
Pin No.
ADCMP553
7
Mnemonic
LEB
LEB
QB
QB
V
CC
Function
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB .
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB .
One of Two Complementary Outputs for Channel B. QB is logic low if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
One of Two Complementary Outputs for Channel B. QB is logic high if the
analog voltage at the noninverting input is greater than the analog voltage at
the inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
Positive Supply Terminal.
Rev. 0 | Page 7 of 16
ADCMP551/ADCMP552/ADCMP553