CS8415A-CSR CIRRUS [Cirrus Logic], CS8415A-CSR Datasheet - Page 45

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CS8415A-CSR

Manufacturer Part Number
CS8415A-CSR
Description
96 kHz Digital Audio Interface Receiver
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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DS470F4
15.3.4 Jitter Attenuation
−10
−15
−20
−10
−15
−20
−25
−5
−5
10
10
5
0
5
0
−1
−1
Figure 23. Revision A2 using A1 Values
Shown in
sions of the CS8415A when used with the appropriate external PLL component values (as noted in
Table
less than 32 kHz. These specifications state a maximum of 2 dB jitter gain or peaking.
10
10
0
0
6). The AES3 and IEC60958-4 specifications do not have allowances for locking to sample rates
Figure 21. Revision A
Figure
10
10
1
1
Jitter Frequency (Hz)
Jitter Frequency (Hz)
21,
10
10
2
2
Figure
10
10
22,
3
3
Figure
10
10
4
4
23, and
10
10
5
5
Figure 24
−10
−15
−20
−10
−15
−20
−25
−5
−5
10
5
0
10
5
0
−1
−1
Figure 24. Revision A2 using A2* Values
are jitter attenuation plots for the various revi-
10
10
0
0
Figure 22. Revision A1
10
10
1
1
Jitter Frequency (Hz)
Jitter Frequency (Hz)
10
10
2
2
10
10
3
3
CS8415A
10
10
4
4
10
10
45
5
5

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