CS8401A-IP ETC [List of Unclassifed Manufacturers], CS8401A-IP Datasheet - Page 23

• Manufacturer Part Number: CS8401A-IP
• Description: Digital Audio Interface Transmitter
• Manufacturer: ETC [List of Unclassifed Manufacturers]

C2 is tied high, channel status bit 2 will be trans-
mitted as a zero. Also, FC0 and FC1 are encoded
versions of channel status bits 24 and 25, which
define the sample frequency. When FC0 and FC1
are both high, the part is placed in a CD sub-
mode which activates the CD subcode port. This
submode is described in detail in the next sec-
tion. Table 5 describes the encoding of C24 and
C25 through the FC1 and FC0 pins. According
to AES/EBU standards, C2 is copy prohibit/per-
mit, C3 specifies pre-emphasis, C8 and C9
define the category code, and C15 identifies the
generation status of the transmitted material (i.e..
first generation, second generation).
Consumer - CD Submode
The consumer CD submode is invoked by plac-
ing the part in consumer mode (PRO = high) and
FSYNC
DS60F1
SDATA
+5V
SCK
EM1
0
0
1
1
C
U
V
PRO
10
11
9
8
6
7
EM0
Table 4. Emphasis Encoding
2
0
1
0
1
FC0
Registers
3
FC1
24
C2
1
1
1
0
C2
4
Figure 20. CS8402A Block Diagram - Consumer Mode
C3
M2 M1 M0
1
23
C3
Serial
Logic
Port
C8
1
1
0
0
13
22
C9
14
21
C15
C4
1
0
0
0
12
setting both FC1 and FC0 high. This mode rede-
fines some of the pins for a CD subcode port as
shown in Figure 21. The CD subcode port pins,
SBF and SBC, replace the C and CBL pins respec-
tively. The user data input, U, becomes the CD
subcode input. Figure 22 describes the timing for
the CD subcode port. When SBF is low, SBC be-
comes active, clocking in the subcode bits. SBF
goes high for one SCK period, one half SCK pe-
riod after the active edge of FSYNC for all formats
(except format 4, which will be one and a half
SCK periods after the active edge of FSYNC). SBF
high for more than 16 SBC periods indicates the
start of a subcode block. The first, third, and fourth
Q bits after the start of a subcode block become
channel status bits 5, 2, and 3 respectively. Chan-
nel status bits are set by the dedicated pins; the
category code is forced to CD.
FC1
Preamble
Validity
0
0
1
1
U Bits
Audio
Parity
Aux
C Bits
Table 5. Sample Frequency Encoding
FC0
0
1
0
1
Mux
C24
0
0
1
0
CBL
Encoder
Biphase
C25
Timing
Mark
0
1
1
0
15
MCK
5
44.1 kHz
48.0 kHz
32.0 kHz
44.1 kHz, CD Mode
Comments
Driver
CS8402A
Line
16
20
17
RST
TXP
TXN
23