EL5153 INTERSIL [Intersil Corporation], EL5153 Datasheet - Page 10

• Manufacturer Part Number: EL5153
• Description: 270MHz Ultra-Accurate Amplifiers
• Manufacturer: INTERSIL [Intersil Corporation]

Disable/Power-Down
The EL5152 and EL5253 can be disabled with their output
placed in a high impedance state. The turn off time is about
330ns and the turn on time is about 130ns. When disabled,
the amplifier's supply current is reduced to 17µA typically;
essentially eliminating power consumption. The amplifier's
power down is controlled by standard TTL or CMOS signal
levels at the ENABLE pin. The applied logic signal is relative
to V
a signal that is less than 0.8V above V
amplifier. The amplifier is disabled when the signal at
ENABLE pin is above V
Output Drive Capability
The EL5152 and EL5153 families do not have internal short
circuit protection circuitry. Typically, short circuit currents as
high as 95mA and 70mA can be expected and naturally, if
the output is shorted indefinitely the part can easily be
damaged from overheating, or excessive current density
may eventually compromise metal integrity. Maximum
reliability is maintained if the output current is always held
below ±40mA. This limit is set and limited by the design of
the internal metal interconnect. Note that in transient
applications, the part is extremely robust.
Power Dissipation
With the high output drive capability of the EL5152 and
EL5153 families, it is possible to exceed the 125°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for an application to
determine if load conditions or package types need to be
modified to assure operation of the amplifier in a safe
operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
PD
PD
T
T
θ
MAX
MAX
AMAX
JMAX
S
JA
- pin. Letting the ENABLE pin float or the application of
= Thermal resistance of the package
=
=
= Maximum junction temperature
= Maximum ambient temperature
V
T
-------------------------------------------- -
JMAX
S
×
I
SMAX
Θ
–
JA
T
AMAX
+
i
S
∑
=
n
+ -1.5V.
1
(
V
10
S
–
V
OUTi
S
)
- enables the
×
EL5152, EL5153, EL5252, EL5455
V
---------------- -
OUTi
R
Li
For sinking:
Where:
By setting the two PD
can solve the output current and R
overheat.
Power Supply Bypassing Printed Circuit Board
Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as short as possible. The power supply
pin must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the V
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from V
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the V
supply rail. See Figure 1 for a complete tuned power supply
bypass methodology.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
PD
V
IS
V
R
I
N = number of amplifiers (Max = 2)
LOAD
MAX
S
OUT
LOAD
MAX
= Supply voltage
=
= Maximum output voltage of the application
= Load current
= Maximum quiescent supply current
= Load resistance tied to ground
V
S
×
I
SMAX
MAX
+
i
∑
=
n
1
equations equal to each other, we
(
S
V
- pin becomes the negative
OUTi
–
LOAD
V
S
)
×
to avoid the device
I
LOADi
S
October 3, 2005
- pin is
FN7385.4
S
+