OPA2690IDBV BURR-BROWN [Burr-Brown Corporation], OPA2690IDBV Datasheet - Page 16

• Manufacturer Part Number: OPA2690IDBV
• Description: Dual, Wideband, Voltage-Feedback OPERATIONAL AMPLIFIER with Disable
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

OPA2690
SBOS238D − JUNE 2002 − REVISED DECEMBER 2004
Typically, channel switching is performed either on sync or
retrace time in the video signal. The two inputs are
approximately equal at this time. The make-before-break
disable characteristic of the OPA2690 ensures that there
is always one amplifier controlling the line when using a
wired-OR circuit like that shown in Figure 6. As both inputs
may be on for a short period during the transition between
channels, the outputs are combined through the output
impedance matching resistors (82.5Ω in this case). When
one channel is disabled, its feedback network forms part
of the output impedance and slightly attenuates the signal
in getting out onto the cable. The gain and output matching
resistor have been slightly increased to get a signal gain
of +1 at the matched load and provide a 75Ω output
impedance to the cable. The video multiplexer connection
(see Figure 6) also ensures that the maximum differential
voltage across the inputs of the unselected channel does
not exceed the rated ±1.2V maximum for standard video
signal levels.
See the Disable Operation section for the turn-on and
turn-off switching glitches using a 0V input for a single
channel is typically less than ±50mV. Where two outputs
are switched (see Figure 6), the output line is always under
the control of one amplifier or the other due to the
make-before-break disable timing. In this case, the
switching glitches for two 0V inputs drops to < 20mV.
HIGH-SPEED DELAY CIRCUIT
The OPA2690 makes an ideal amplifier for a variety of
active filter designs. Shown in Figure 7 is a circuit that uses
the two amplifiers within the dual OPA2690 to design a
2-stage analog delay circuit. For simplicity, the circuit uses
a dual-supply (±5V) operation, but it can also be modified
to operate on a signal supply. The input to the first filter
stage is driven by the OPA692 wideband buffer amplifier
to isolate the signal input from the filter network.
Each of the two filter stages is a 1st-order filter with a
voltage gain of +1. The delay time through one filter is
given by Equation 3.
16
V
IN
OPA692
t
GR0
+ 2RC
C
402Ω
R
G
Figure 7. 2-Stage, All-Pass Network
R
OP A26 90
1/2
402Ω
(3)
R
F
For a more accurate analysis of the circuit, consider the
group delay for the amplifiers. For example, in the case of
the OPA2690, the group delay in the bandwidth from 1MHz
to 100MHz is approximately 1.0ns. To account for this,
modify the transfer function, which now comes out to be:
with T
values of resistors R
avoid parasitic effects. If the all-pass filter is designed for
very low delay times, include parasitic board capacitances
to calculate the correct delay time. Simulating this
application using the PSPICE model of the OPA2690 will
allow this design to be tuned to the desired performance.
DIFFERENTIAL RECEIVER/DRIVER
A very versatile application for a dual operational amplifier
is the differential amplifier configuration detailed in
Figure 8. With both amplifiers of the OPA2690 connected
for noninverting operation, the circuit provides a high input
impedance whereas the gain can easily be set by just one
resistor, R
may be limited as a result of the common-mode input
swing limits of the amplifier itself. An interesting
modification of this circuit is to place a capacitor in series
with the R
+1, whereas the AC gain still follows the standard transfer
function of G = 1 + 2R
for applications processing only a frequency band that
excludes DC or very low frequencies. An input DC voltage
resulting from input bias currents is not amplified by the AC
gain and can be kept low. This circuit can be used as a
differential line receiver, driver, or as an interface to a
differential input ADC.
D
C
= (1/360) × (dφ/df) = delay of the op amp itself. The
G
G
. When operated in low gains, the output swing
. Now the DC gain for each side is reduced to
R
402Ω
t
R
GR
G
+ 2 ( 2RC ) T
F
and R
F
/R
G
OPA 269 0
. This might be advantageous
G
1/2
402Ω
should be equal and low to
R
F
D
)
V
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