ADL5812-EVALZ AD [Analog Devices], ADL5812-EVALZ Datasheet

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ADL5812-EVALZ

Manufacturer Part Number
ADL5812-EVALZ
Description
Dual High IP3, 700 MHz to 2800 MHz, Double Balanced, Passive Mixer, IF Amplifier, and Wideband LO Amplifier
Manufacturer
AD [Analog Devices]
Datasheet
FEATURES
RF frequency: 700 MHz to 2800 MHz continuous
LO frequency: 250 MHz to 2800 MHz, high-side or
IF range: 30 MHz to 450 MHz
Power conversion gain of 6.7 dB at 1900 MHz
SSB noise figure of 11.6 dB at 1900 MHz
Input IP3 of 27.2 dBm at 1900 MHz
Input P1dB of 12.5 dBm at 1900 MHz
Typical LO drive of 0 dBm
Single-ended, 50 Ω RF port
Single-ended or balanced LO input port
Single-supply operation: 3.6 V to 5.0 V
Serial port interface control on all functions
Exposed paddle 6 mm × 6 mm, 40-lead LFCSP package
APPLICATIONS
Multiband/multistandard cellular base station diversity
Wideband radio link diversity downconverters
Multimode cellular extenders and broadband receivers
GENERAL DESCRIPTION
The
limiting, local oscillator (LO) amplifiers to achieve an
unprecedented radio frequency (RF) bandwidth of 700 MHz
to 2800 MHz. Unlike conventional narrow-band sine wave LO
amplifier solutions, this permits the LO to be applied either
above or below the RF input over an extremely wide bandwidth.
Because energy storage elements are not used, the dc current
consumption also decreases with decreasing LO frequency.
The
cores along with integrated RF and LO balancing circuits to
allow single-ended operation. The
programmable RF baluns, allowing optimal performance over
a 700 MHz to 2800 MHz RF input frequency. The balanced
passive mixer arrangement provides outstanding LO-to-RF and
LO-to-IF leakages, excellent RF-to-IF isolation, and excellent
intermodulation performance over the full RF bandwidth.
The balanced mixer cores also provide extremely high input
linearity, allowing the device to be used in demanding
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
low-side inject
receivers
ADL5812
ADL5812
uses highly linear, doubly balanced, passive mixer
uses revolutionary new broadband, square wave
ADL5812
incorporates
Dual High IP3, 700 MHz to 2800 MHz, Double Balanced,
Passive Mixer, IF Amplifier, and Wideband LO Amplifier
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
wideband applications where in-band blocking signals may
otherwise result in the degradation of dynamic range. Blocker
noise figure performance is comparable to narrow-band passive
mixer designs. High linearity IF buffer amplifiers follow the
passive mixer cores, yielding typical power conversion gains of
6.7 dB, and can be used with a wide range of output
impedances. For low voltage applications, the
capable of operation at voltages down to 3.6 V with
substantially reduced current. Two logic bits are provided to
individually power down (1.5 mA for both channels) the two
channels as desired.
All features of the
port interface, resulting in optimum performance and
minimum external components.
The
IC process. The device is available in a 40-lead, 6mm × 6mm,
LFCSP package and operates over a −40°C to +85°C
temperature range. An evaluation board is also available.
ADL5812
RFCT1
RFCT2
RF1
RF2
NC
NC
NC
NC
NC
NC
10
1
2
3
4
5
6
7
8
9
FUNCTIONAL BLOCK DIAGRAM
40
11
is fabricated using a BiCMOS high performance
39
12
ADL5812
38
13
©2011 Analog Devices, Inc. All rights reserved.
37
14
Figure 1.
are controlled via a 3-wire serial
36
15
BIAS
GEN
16
35
34
17
INTERFACE
ADL5812
SERIAL
PORT
33
18
19
32
ADL5812
ADL5812
31
20
www.analog.com
30
29
28
27
26
25
24
23
22
21
V1LO1
NC
NC
NC
LOIP
LOIN
LE
DATA
CLK
V2LO1
is

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ADL5812-EVALZ Summary of contents

Page 1

... LFCSP package and operates over a −40°C to +85°C temperature range. An evaluation board is also available. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ADL5812 FUNCTIONAL BLOCK DIAGRAM ADL5812 BIAS GEN SERIAL PORT 9 INTERFACE ...

Page 2

... ADL5812 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics ................................................................ 4 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 3.6 V Performance...................................................................... 16 Spurious Performance................................................................ 17 Circuit Description......................................................................... 20 REVISION HISTORY 7/11—Revision 0: Initial Version RF Subsystem.............................................................................. 20 LO Subsystem ............................................................................. 21 Applications Information ...

Page 3

... MHz 2000 MHz 1697 MHz, each RF tone RF1 RF2 LO at −10 dBm Unfiltered IF output −10 dBm input power −10 dBm input power Resistor programmable IF current Rev Page ADL5812 = 50 Ω, optimum O Min Typ Max Unit Ω 700 2800 MHz 260||1.2 Ω ...

Page 4

... ADL5812 TIMING CHARACTERISTICS Low logic level ≤ 0.4 V, and high logic level ≥ 1.4 V. Table 2. Serial Interface Timing Parameter Limit Timing Diagram CLK t 2 DB23 (MSB) DATA LE Unit Test Conditions/Comments ns minimum LE setup time ...

Page 5

... V section of this specification is not implied. Exposure to absolute 5.5 V maximum rating conditions for extended periods may affect 6.0 V device reliability. 20 dBm 13 dBm ESD CAUTION 2.5 W 30°C 150°C −40°C to +85°C −65°C to +150°C Rev Page ADL5812 ...

Page 6

... V1LO1, V1LO2, V1LO3, V1LO4, V2LO1, V2LO2, V2LO3, V2LO4 22, 23, 24 CLK, DATA LOIN 26 LOIP EPAD RF1 1 30 V1LO1 RFCT1 ADL5812 LOIP TOP VIEW LOIN (Not to Scale DATA RFCT2 9 22 CLK RF2 10 ...

Page 7

... Figure 8. Input P1dB vs. RF Frequency –40° +25° +85° 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 RF FREQUENCY (MHz) Figure 9. SSB Noise Figure vs. RF Frequency ADL5812 T = –40° +25° +85°C A ...

Page 8

... ADL5812 450 400 350 300 250 200 –40 – TEMPERATURE (°C) Figure 10. Supply Current vs. Temperature 8 4.75V POS V = 5.00V POS V = 5.25V POS 7.5 7.0 6.5 6.0 5.5 5.0 –40 – TEMPERATURE (°C) Figure 11. Power Conversion Gain vs. Temperature –40 – TEMPERATURE (°C) Figure 12 ...

Page 9

... RF = 900MHz RF = 1900MHz RF = 2500MHz 380 430 Rev Page ADL5812 RF = 900MHz RF = 1900MHz RF = 2500MHz 80 130 180 230 280 330 380 IF FREQUENCY (MHz) Figure 19. Input IP2 vs. IF Frequency RF = 900MHz RF = 1900MHz RF = 2500MHz 80 130 180 230 280 330 ...

Page 10

... ADL5812 900MHz RF = 1900MHz RF = 2500MHz –6 –4 – POWER (dBm) Figure 22. Power Conversion Gain vs. LO Power 900MHz RF = 1900MHz RF = 2500MHz –6 –4 – POWER (dBm) Figure 23. Input IP3 vs. LO Power ...

Page 11

... Rev Page ADL5812 900MHz RF = 1900MHz RF = 2500MHz 180 230 280 330 380 430 480 IF FREQUENCY (MHz) ...

Page 12

... ADL5812 – –40° +25° +85°C A –15 –20 –25 –30 –35 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 RF FREQUENCY (MHz) Figure 34. RF-to-IF Isolation vs. RF Frequency – –40° +25°C – +85°C A –20 –25 –30 – ...

Page 13

... IF BIAS RESISTOR VALUE (Ω) IF Bias Resistor Value 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 RF FREQUENCY (MHz) ADL5812 –40°C = +25°C ...

Page 14

... ADL5812 12 RFB = 0 11 RFB = 1 RFB = 2 10 RFB = 3 RFB = 4 9 RFB = 5 RFB = 6 8 RFB = 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 RF FREQUENCY (MHz) RF FREQUENCY (MHz) Figure 45. Conversion Gain vs. RF Frequency for All RFB Settings, ...

Page 15

... LPF = 2 LPF = 3 6 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 Figure 52. Noise Figure vs. RF Frequency for All LPF Settings, Rev Page ADL5812 LPF = 0 LPF = 1 LPF = 2 LPF = 3 RF FREQUENCY (MHz) RF FREQUENCY (MHz) RFB and VGS Use Optimum Settings ...

Page 16

... ADL5812 3.6 V PERFORMANCE 25° 1900 MHz SPI settings, unless otherwise noted. 290 T = –40° +25°C 285 +85°C A 280 275 270 265 260 255 250 245 240 235 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 ...

Page 17

... Rev Page ADL5812 −64.8 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 < ...

Page 18

... ADL5812 Table 2500 MHz 2297 MHz −29.3 −41.2 1 −26.2 0.0 −45.0 −46.1 2 −84.5 −72.0 −57.9 −67.1 3 <−100 −87.7 −83.4 4 <−100 <−100 5 <−100 3.6 V Performance 25°C, RF power = −10 dBm, LO power = 0 dBm 800 Ω, Z ...

Page 19

... Rev Page ADL5812 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 < ...

Page 20

... The purpose of the LO subsystem is to provide a large, fixed amplitude, balanced signal to drive the mixer independent of the level of the LO input. A block diagram of the device is shown in Figure 59 RF1 1 RFCT1 2 ADL5812 BIAS GEN SERIAL ...

Page 21

... Logic 0 input level of less than 0.4 V and a Logic 1 input level that exceeds 1.4 V. All pins, including the RF pins, are ESD protected and have been ADL5812 tested level of 2000 V HBM and 1250 V CDM. Rev Page ADL5812 has a power-down mode. This power- ...

Page 22

... C5 C4 120pF 120pF R21 R1 0Ω 910Ω PAD 1 30 RF1 V1LO1 2 29 RFCT1 LOIP ADL5812 LOIN DATA 9 22 RFCT2 CLK 21 RF2 V2LO1 C2.3 R2 10pF 910Ω IFOP 120pF TC4-1W ...

Page 23

... The channels of the RFB settings. Power conversion gain, input IP3, NF, and input P1dB can be optimized, as shown in Figure 45 and Figure 48. ADL5812 defaults the are programmed Rev Page ADL5812 allows programmability for the RF balun by ADL5812 defaults the RFB setting to 0 ...

Page 24

... ADL5812 REGISTER STRUCTURE Figure 61 illustrates the register map of the ADL5812. The ADL5812 uses only Register 5. Because of this, set all of the control bits to five. When set to 0, the MAIN ENB and DIV ENB bits, DB7 and DB6, respectively, enable the part. By setting one of these bits to 1, its channel is powered down ...

Page 25

... EVALUATION BOARD An evaluation board is available for the ADL5812. The standard evaluation board schematic is presented in Figure 62. The USB interface circuitry schematic is presented in Figure 65. The evaluation board layout is shown in Figure 63 and Figure 64. L1 470nH VCC L2 C1 470nH 0.1µF C2 0.1µF C8 0.1µF RFIN1 C6 22pF C7 22pF ...

Page 26

... ADL5812 Figure 63. Evaluation Board Top Layer C34 3V3_USB 10PF C35 U7 8 DGND 0.1UF 1 VCC SCL SDA 7 WC_N GND 4 24LC64-I-SN DGND R9 3V3_USB R10 100K 100K C38 C39 0.1UF 0.1UF DGND 5V_USB DGND A AGND D1 C DGND Y2 24 ...

Page 27

... OUTLINE DIMENSIONS PIN 1 INDEX AREA 0.90 0.85 0.80 SEATING PLANE ORDERING GUIDE 1 Model Temperature Range ADL5812ACPZ-R7 −40°C to +85°C ADL5812-EVALZ RoHS Compliant Part. 0.30 6.00 0.25 BSC SQ 0. 0.50 BSC EXPOSED PAD 21 0.45 20 TOP VIEW BOTTOM VIEW 0.40 0.35 0.21 MAX FOR PROPER CONNECTION OF 0.19 MIN THE EXPOSED PAD, REFER TO ...

Page 28

... ADL5812 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09913-0-7/11(0) Rev Page ...

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