ADL5565 AD [Analog Devices], ADL5565 Datasheet - Page 20

• Manufacturer Part Number: ADL5565
• Description: 6 GHz Ultrahigh Dynamic Range Differential Amplifier
• Manufacturer: AD [Analog Devices]

ADL5565
ADC INTERFACING
The
for ADC interfacing. There are several options available to the
designer when using the ADL5565. Figure 40 uses a wideband
1:1 transmission line balun followed by two 40 Ω resistors in
parallel with the three input impedances (which change with
the gain selection of the ADL5565) to provide a 50 Ω differential
impedance and provides a wideband match to a 50 Ω source.
The
mode dc loading. The 33 Ω resistors improve the isolation between
the
to-digital, sample-and-hold circuitry. The
530 Ω differential load impedance and requires a 2 V to 2.5 V
differential input swing to reach full scale (VREF = 1 V to 1.25 V).
This circuit provides variable gain, isolation, and source
matching for the AD9467.
Applying a full-scale, single-tone signal from the ADL5565, an
SFDR of 89.2 dBc is realized (see Figure 37). Applying two half-
scale signals from the
87.5 dBc is achieved at 100 MHz (see Figure 38). The bandwidth
of the circuit in Figure 40 is shown in Figure 39.
ADL5565
ADL5565
ADL5565
–105
–120
–135
–150
–15
–30
–45
–60
–75
–90
0
0
Figure 37. Measured Single-Tone Performance of the
GAIN = 6dB
SNR = 69.44dBc
SFDR = 89.2dBc
SECOND = –85.1dBc
THIRD = –89.3dBc
NOISE FLOOR = –115.7dB
Circuit in Figure 40 for a 100 MHz Input Signal
and any switching currents present at the analog-
is a high output linearity amplifier that is optimized
is ac-coupled from the
15
2
+
30
ADL5565
4
6
45
FREQUENCY (MHz)
AC
50Ω
60
in a gain of 6 dB, an SFDR of
AD9467
75
ETC1-1-13
AD9467
Figure 40. Wideband ADC Interfacing Example Featuring the AD9467
5
90
to avoid common-
40Ω
40Ω
input presents a
3
105
0.1 µF
0.1µF
120
A
B
Rev. 0 | Page 20 of 28
VIP2
VIP1
VIN1
VIN2
ADL5565
VON
VOP
The wideband frequency response is an advantage in broad-
band applications, such as predistortion receiver designs and
instrumentation applications. However, by designing for a wide
analog input frequency range, the cascaded SNR performance is
somewhat degraded due to high frequency noise aliasing into
the wanted Nyquist zone.
Figure 38. Measured Two-Tone Performance of the Circuit in Figure 40 for a
0.1µF
0.1µF
–105
–120
–135
–150
–15
–30
–45
–60
–75
–90
–
–
–
–
–
0
1
2
3
4
5
Figure 39. Measured Frequency Response of the Wideband
0
0
0
F2 – F1
FUNDAMENTAL1 = –7.078dBFS
FUNDAMENTAL2 = –7.169dBFS
IMD (2f1 – f2) = –88.237dBc
IMD (2f2 + f1) = –91.37dBc
NOISE FLOOR = –115.96dB
33Ω
33Ω
15
ADC Interface Depicted in Figure 40
100
16-BIT ADC
AD9467
30
VIN+
VIN–
F1 – F2
100 MHz Input Signal
FREQUENCY (MHz)
45
FREQUENCY (MHz)
200
16
60
300
2F1 – 2F2
75
2F2 – 2F1
90
400
2F1 – F2
105
2F2 – F1
120
500