AD8200YCSURF AD [Analog Devices], AD8200YCSURF Datasheet - Page 5

• Manufacturer Part Number: AD8200YCSURF
• Description: High Common-Mode Voltage, Single-Supply Difference Amplifier
• Manufacturer: AD [Analog Devices]

THEORY OF OPERATION
The AD8200 consists of a preamp and buffer arranged as shown
in Figure 3. Like-named resistors have equal values.
The preamp incorporates a dynamic bridge (subtractor) circuit.
Identical networks (within the shaded areas), consisting of R
R
Note that when equal amplitude signals are asserted at inputs 1
and 8, and the output of A1 is equal to the common potential
(i.e., zero), the two attenuators form a balanced-bridge network.
When the bridge is balanced, the differential input voltage at
A1, and thus its output, will be zero.
Any common-mode voltage applied to both inputs will keep the
bridge balanced and the A1 output at zero. Because the resistor
networks are carefully matched, the common-mode signal rejec-
tion approaches this ideal state.
However, if the signals applied to the inputs differ, the result is a
difference at the input to A1. A1 responds by adjusting its output
to drive R
input until it matches the voltage at its noninverting input.
By attenuating voltages at Pins 1 and 8, the amplifier inputs are
held within the power supply range, even if Pin 1 and Pin 8
input levels exceed the supply, or fall below common (ground.)
The input network also attenuates normal (differential) mode
voltages. R
forcing large output signals to balance relatively small differen-
tial inputs. The resistor ratios establish the preamp gain at 10.
Because the differential input signal is attenuated, and then
amplified to yield an overall gain of 10, the amplifier A1 oper-
ates at a higher noise gain, multiplying deficiencies such as input
offset voltage and noise with respect to Pins 1 and 8.
REV. B
B
R
, R
G
C
+IN
, and R
R
R
R
B
C
A
B
COM
, by way of R
C
TEK RUN: 2.5MS/s HI RES
and R
G
R
R
R
Figure 3. Simplified Schematic
1
2
B
C
, attenuate input signals applied to Pins 1 and 8.
A
–IN
CH1 500mV
G
TPC 7. Pulse Response
R
form an attenuator that scales A1 feedback,
V
R
G
OUT
V
CM
G
IN
, to adjust the voltage at its inverting
, R
L
CH2
= 10k
R
CM
A1
A3
50mV
T
M 20 s CH1
(TRIMMED)
100k
AD8200
1.5V
A2
R
R
F
F
A
,
–5–
To minimize these errors while extending the common-mode
range, a dedicated feedback loop is employed to reduce the
range of common-mode voltage applied to A1, for a given over-
all range at the inputs. By offsetting the range of voltage applied
to the compensator, the input common-mode range is also offset
to include voltages more negative than the power supply. Ampli-
fier A3 detects the common-mode signal applied to A1 and
adjusts the voltage on the matched R
common-mode voltage range at the A1 inputs. By adjusting the
common voltage of these resistors, the common-mode input
range is extended while, at the same time, the normal mode
signal attenuation is reduced, leading to better performance
referred to input.
The output of the dynamic bridge taken from A1 is connected
to Pin 3 by way of a 100 kΩ series resistor, provided for low-
pass filtering and gain adjustment. The resistors in the input
networks of the preamp and the buffer feedback resistors are
ratio-trimmed for high accuracy.
The output of the preamp drives a gain-of-two buffer-amplifier
A2, implemented with carefully matched feedback resistors R
The two-stage system architecture of the AD8200 enables the
user to incorporate a low-pass filter prior to the output buffer.
By separating the gain into two stages, a full-scale rail-to-rail
signal from the preamp can be filtered at Pin 3, and a half-scale
signal resulting from filtering can be restored to full scale by the
output buffer amp. The source resistance seen by the inverting
input of A2 is approximately 100 kΩ, to minimize the effects of
A2’s input bias current. However, this current is quite small and
errors resulting from applications that mismatch the resistance
are correspondingly small.
APPLICATIONS
The AD8200 difference amplifier is intended for applications
where it is required to extract a small differential signal in the
presence of large common-mode voltages. The input resistance
is nominally 200 kΩ, and the device can tolerate common-mode
voltages higher than the supply voltage and lower than ground.
The open collector output stage will source current to within
20 mV of ground.
TEK RUN: 2.5MS/s AVERAGE
1
3
2
CH1 1V
CH3 100mV
V
TPC 8. Settling Time
OUT
, R
V
IN
MAGNIFIED V
L
CH 2
= 10k
10mV M 20 s CH1
OUT
CM
resistors to reduce the
1.36V
AD8200
F
.