ADA4940-1 AD [Analog Devices], ADA4940-1 Datasheet - Page 7

• Manufacturer Part Number: ADA4940-1
• Description: Ultralow Power, Low Distortion
• Manufacturer: AD [Analog Devices]

Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 9.
Parameter
Supply Voltage
V
Differential Input Voltage
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
ESD
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
specified for the device soldered on a circuit board in still air.
Table 10.
Package Type
8-Lead SOIC (Single)/4-Layer Board
16-Lead LFCSP (Single)/4-Layer Board
24-Lead LFCSP (Dual)/4-Layer Board
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4940-1/
ADA4940-2
junction temperature (T
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
ADA4940-1/ADA4940-2. Exceeding a junction temperature
of 150°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
OCM
JA
Field Induced Charged Device Model (FICDM)
Human Body Model (HBM)
is specified for the worst-case conditions, that is, θ
packages is limited by the associated rise in
J
) on the die. At approximately 150°C,
θ
158
91.3
65.1
JA
Rating
8 V
±V
1.2 V
−40°C to +125°C
−65°C to +150°C
300°C
150°C
1250 V
2000 V
S
JA
Unit
°C/W
°C/W
°C/W
is
Rev. B | Page 7 of 32
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power dissipation is the voltage between the supply pins (±V
times the quiescent current (I
differential and common-mode currents flowing to the load, as
well as currents flowing through the external feedback networks
and internal common-mode feedback loop. The internal
resistor tap used in the common-mode feedback loop places a
negligible differential load on the output. RMS voltages and
currents should be considered when dealing with ac signals.
Airflow reduces θ
with the package leads from metal traces, through holes, ground,
and power planes reduces the θ
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 8-lead SOIC (θ
158°C/W, single)the 16-lead LFCSP (θ
24-lead LFCSP (θ
standard 4-layer board. θ
ESD CAUTION
Figure 3. Maximum Safe Power Dissipation vs. Ambient Temperature
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
–40
ADA4940-1 (SOIC)
–20
ADA4940-2 (LFCSP)
JA
JA
. In addition, more metal directly in contact
= 65.1°C/W, dual) packages on a JEDEC
0
AMBIENT TEMPERATURE (°C)
20
JA
values are approximations.
ADA4940-1/ADA4940-2
S
ADA4940-1 (LFCSP)
). The load current consists of the
40
JA
.
60
JA
D
= 91.3°C/W, single) and
) is the sum of the
80
100
120
JA
S
=
)