ADL5380-29A-EVALZ AD [Analog Devices], ADL5380-29A-EVALZ Datasheet - Page 26
![no-image](/images/no-image-200.jpg)
ADL5380-29A-EVALZ
Manufacturer Part Number
ADL5380-29A-EVALZ
Description
400 MHz to 6 GHz Quadrature Demodulator
Manufacturer
AD [Analog Devices]
Datasheet
1.ADL5380-29A-EVALZ.pdf
(36 pages)
ADL5380
Figure 86 and Figure 87 show the excellent image rejection
capabilities of the ADL5380 for low IF applications, such as
W-CDMA. The ADL5380 exhibits image rejection greater than
45 dB over a broad frequency range.
Figure 87. High Band Image Rejection vs. RF Frequency for a W-CDMA Signal,
EXAMPLE BASEBAND INTERFACE
In most direct-conversion receiver designs, it is desirable to
select a wanted carrier within a specified band. The desired
channel can be demodulated by tuning the LO to the appropriate
carrier frequency. If the desired RF band contains multiple
carriers of interest, the adjacent carriers are also down converted to
a lower IF frequency. These adjacent carriers can be problematic if
they are large relative to the wanted carrier because they can
overdrive the baseband signal detection circuitry. As a result, it
is often necessary to insert a filter to provide sufficient rejection
of the adjacent carriers.
Figure 86. Low Band and Midband Image Rejection vs. RF Frequency for a
60
50
40
30
20
10
60
50
40
30
20
10
0
0
5000
400
W-CDMA Signal, IF = 2.5 MHz, 5 MHz, and 7.5 MHz
800
5200
IF = 2.5 MHz, 5 MHz, and 7.5 MHz
1200
2.5MHz LOW IF
5MHz LOW IF
7MHz LOW IF
2.5MHz LOW IF
5MHz LOW IF
7MHz LOW IF
1600
RF FREQUENCY (MHz)
RF FREQUENCY (MHz)
5400
2000
2400
5600
2800
3200 3600
5800
4000
6000
Rev. 0 | Page 26 of 36
It is necessary to consider the overall source and load impedance
presented by the ADL5380 and ADC input when designing the
filter network. The differential baseband output impedance of
the ADL5380 is 50 Ω. The ADL5380 is designed to drive a high
impedance ADC input. It may be desirable to terminate the
ADC input down to lower impedance by using a terminating
resistor, such as 500 Ω. The terminating resistor helps to better
define the input impedance at the ADC input at the cost of a
slightly reduced gain (see the Circuit Description section for
details on the emitter-follower output loading effects).
The order and type of filter network depends on the desired high
frequency rejection required, pass-band ripple, and group delay.
Filter design tables provide outlines for various filter types and
orders, illustrating the normalized inductor and capacitor values
for a 1 Hz cutoff frequency and 1 Ω load. After scaling the
normalized prototype element values by the actual desired
cut-off frequency and load impedance, the series reactance
elements are halved to realize the final balanced filter network
component values.
As an example, a second-order Butterworth, low-pass filter design
is shown in Figure 88 where the differential load impedance is
500 Ω and the source impedance of the ADL5380 is 50 Ω. The
normalized series inductor value for the 10-to-1, load-to-source
impedance ratio is 0.074 H, and the normalized shunt capacitor
is 14.814 F. For a 10.9 MHz cutoff frequency, the single-ended
equivalent circuit consists of a 0.54 μH series inductor followed
by a 433 pF shunt capacitor.
The balanced configuration is realized as the 0.54 μH inductor
is split in half to realize the network shown in Figure 88.
V
V
V
S
S
S
Figure 88. Second-Order Butterworth, Low-Pass Filter Design Example
R
R
S
L
= 0.1
R
R
R
R
S
2
2
S
S
S
= 50Ω
= 50Ω
= 25Ω
= 25Ω
CONFIGURATION
CONFIGURATION
DENORMALIZED
SINGLE-ENDED
SINGLE-ENDED
NORMALIZED
EQUIVALENT
L
BALANCED
N
0.54µH
0.27µH
0.27µH
= 0.074H
C
N
14.814F
433pF
433pF
f
f
C
R
C
R
R
R
2
2
= 10.9MHz
L
L
L
= 1Hz
L
= 500Ω
= 500Ω
= 250Ω
= 250Ω