LT3460ES5 LINER [Linear Technology], LT3460ES5 Datasheet - Page 6

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LT3460ES5

Manufacturer Part Number
LT3460ES5
Description
1.3MHz Step-Up DC/DC Converter in SC70 and ThinSOT
Manufacturer
LINER [Linear Technology]
Datasheet

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LT3460
OPERATIO
margin, C
quency between the zero and the pole is at the cross over
frequency.
With C
as shown in Figure 4. The phase margin is about 60 .
6
F
= 20pF, the feedback loop Bode plot is reshaped
V
OUT
F
–10
–20
–30
–40
60
50
40
30
20
10
0
should be chosen so that the midpoint fre-
1
GND
PHASE
GAIN
+
U
D1
C2
10
FREQUENCY (kHz)
R2
Figure 4.
(SOT-23 PACKAGE)
R1
L1
100
C
C1
F
3460 F04
1000
90
45
0
–45
–90
–135
–180
–225
–270
–315
–360
Figure 5. Suggested Layout
V
SHUTDOWN
IN
The feed-forward capacitor increases the gain at high
frequency. The feedback loop therefore needs to have
enough attenuation at the switching frequency to reject the
switching noise. Additional internal compensation com-
ponents have taken this into consideration.
For most of the applications of LT3460, the output capaci-
tor ESR zero is at very high frequency and can be ignored.
If a low frequency ESR zero exists, for example, when a
high-ESR Tantalum capacitor is used at the output, the
phase margin may be enough even without a feed-forward
capacitor. In these cases, the feed-forward capacitor should
not be added because it may cause the feedback loop to
not have enough attenuation at the switching frequency.
Layout Hints
The high speed operation of the LT3460 demands careful
attention to board layout. You will not get advertised
performance with careless layout. Figure 5 shows the
recommended component placement.
V
OUT
GND
+
D1
C2
R2
(SC70 PACKAGE)
R1
L1
C
C1
F
V
SHUTDOWN
IN
3460 F05
3460f

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