LT3431 LINER [Linear Technology], LT3431 Datasheet - Page 17

no-image

LT3431

Manufacturer Part Number
LT3431
Description
High Voltage, 3A,500kHz Step-Down Switching Regulator
Manufacturer
LINER [Linear Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LT3431EFE
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT3431EFE#PBF
Manufacturer:
LT/凌特
Quantity:
20 000
Part Number:
LT3431EFE#TRPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT3431IFE
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LT3431IFE#PBF
Manufacturer:
LT
Quantity:
1 031
Part Number:
LT3431IFE#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
APPLICATIO S I FOR ATIO
reduced. This type of subharmonic switching only occurs
at input voltages less than twice output voltage. Higher
inductor values will tend to eliminate this problem. See
Frequency Compensation section for a discussion of an
entirely different cause of subharmonic switching before
assuming that the cause is insufficient slope compensa-
tion. Application Note 19 has more details on the theory
of slope compensation.
At power-up, when V
Figure 2, Q2), the sync function is disabled. This allows the
frequency foldback to operate in the shorted output con-
dition. During normal operation, switching frequency is
controlled by the internal oscillator until the FB pin reaches
0.6V, after which the SYNC pin becomes operational. If no
synchronization is required, this pin should be connected
to ground.
LAYOUT CONSIDERATIONS
As with all high frequency switchers, when considering
layout, care must be taken in order to achieve optimal elec-
trical, thermal and noise performance. For maximum
efficiency, switch rise and fall times are typically in the
AVAILABLE SPACE UNDERNEATH
THE DEVICE BETWEEN PINS AND
SHORTED TOGETHER (USING
SW PINS 2 AND 5 ARE ALSO
ARE SHORTED TOGETHER.
V
IN
1
2
3
4
5
6 BOOST
GND PLANE)
PINS 3 AND 4
U
C
GND
SW
V
V
SW
IN
IN
is being clamped by the FB pin (see
LT3431
U
MINIMIZE LT3430
C3-D1 LOOP
W
GND
V
IN
GROUND PINS (4 CORNERS) FOR
GOOD THERMAL CONDUCTIVITY
PLACE FEEDTHROUGH AROUND
D1
C3
U
Figure 6. Suggested Layout
L1
1
2
3
4
5
6
7
8
GND
SW
V
V
SW
BOOST
GND
C2
IN
IN
LT3431
D2
nanosecond range. To prevent noise both radiated and
conducted, the high speed switching current path, shown
in Figure 5, must be kept as short as possible. This is imple-
mented in the suggested layout of Figure 6. Shortening
this path will also reduce the parasitic trace inductance of
approximately 25nH/inch. At switch off, this parasitic in-
ductance produces a flyback spike across the LT3431
switch. When operating at higher currents and input volt-
ages, with poor layout, this spike can generate voltages
across the LT3431 that may exceed its absolute maximum
rating. A ground plane should always be used under the
switcher circuitry to prevent interplane coupling and over-
all noise.
BIAS
GND
GND
FB
V
C
16
15
14
13
12
11
10
9
SHDN
SYNC
R2
V
IN
C
Figure 5. High Speed Switching Path
F
C1
CFB
R1
C
GROUND PLANE
C
CONNECT TO
R
C
C3
KELVIN SENSE
CIRCULATING
FREQUENCY
V
GND
V
LT3431
OUT
OUT
HIGH
PATH
KEEP FB AND V
AWAY FROM HIGH FREQUENCY,
HIGH CURRENT COMPONENTS
3431 F06
SOLDER THE EXPOSED PAD
TO THE ENTIRE COPPER
GROUND PLANE UNDERNEATH
THE DEVICE. NOTE: THE BOOST
AND BIAS COPPER TRACES ARE
ON A SEPARATE LAYER FROM
THE GROUND PLANE
C
COMPONENTS
D1
L1
C1
LOAD
LT3431
3431 F05
5V
sn3431 3431fs
17

Related parts for LT3431