HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 62
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HD64570
Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD64570.pdf
(469 pages)
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Table 2.6
Symbol
RD*
WR/RW
*2: Not connected
Rev. 0, 07/98, page 46 of 453
2
CP-84
4
3
Bus Interface Lines
Pin Number
FP-88
15
14
Input/
Output
Input/
output
Input/
output
Description
CPU modes 0, 1
Read: Indicates that the SCA is executing a
read cycle.
Master mode
Slave mode
Reset mode
System stop
mode
CPU modes 2, 3
*
CPU modes 0, 1
Write: Indicates that the SCA is executing a
write cycle.
Master mode
Slave mode
Reset mode
System stop
mode
CPU modes 2, 3
Read/write: Indicates whether the SCA is
executing a read or write cycle, to control the
data direction.
2
Output line. When this line is
driven active low, the data bus
lines are used as inputs.
Input line. When this line is
driven active low, the data bus
lines are used as outputs.
Input.
Input.
Always high. Leave
unconnected, or pull up to V
Output line. When this line is
driven active low, the data bus
lines are used as outputs.
Input line. When this line is
driven active low, the data bus
lines are used as inputs.
Input.
Input.
CC
.
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