PEF2054 SIEMENS [Siemens Semiconductor Group], PEF2054 Datasheet - Page 117

• Manufacturer Part Number: PEF2054
• Description: ICs for Communications
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Figure 40
Circuit for Delaying the Framing Signal at the CFI Interface
Semiconductor Group
SYNC
CLK
DIN
DOUT
CLK
SYNC
DOUT
DIN
FSC
additional hardware must delay the frame signal to enable a synchronization with
the positive edge of DCL. Figure 40 gives a suggestion of how to adapt the
external timing.
+5 V
1st Bit
J
PR
CLR
K
1st Bit
Rising FSC edge marks 2nd Bit of frame
J-K Flip-Flop e.g. 74HC112
Q
Q
2nd Bit
2nd Bit
+5 V
117
3rd Bit
J
PR
CLR
K
3rd Bit
Q
Q
4th Bit
4th Bit
Application Hints
FSC
DCL
(DU#)
(DD#)
5th Bit
EPIC
5th Bit
PEB 2055
PEF 2055
R
ITS08055