U4084B TEMIC [TEMIC Semiconductors], U4084B Datasheet - Page 10

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U4084B

Manufacturer Part Number
U4084B
Description
Low-Voltage, Voice-Switched Circuit for Hands-Free Operation
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet

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Part Number:
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Quantity:
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Level Detectors, Figure 4
There are four level detectors, two on the receive side and
two on the transmit side. As shown in figure 4, the terms
in parentheses form one system, and the other terms form
the second system. Each level detector is a high-gain
amplifier with back-to-back diodes in the feedback path,
resulting in a non-linear gain which permits operation
over a wide dynamic range of speech levels. Refer to
figures 9, 10 and 11 for their AC and DC transfer charac-
teristics. The sensitivity of each level detector is
determined by the external resistor and capacitor at each
input (TLI1, TLI2, RLI1, and RLI2). Each output charges
an external capacitor through a diode and limiting
resistor, thus providing a DC representation of the input
AC signal level. The outputs have a quick rise time (deter-
mined by the capacitor and an internal 350-
and a slow decay time set by an internal current source
and the capacitor. The capacitors on the four outputs
should have the same value (
problems.
On the receive side, one level detector (RLI1) is at the
receive input receiving the same signal as at tip and ring,
and the other (RLI2) is at the output of the speaker ampli-
fier (see figure 2). On the transmit side, one level detector
(TLI2) is at the output of the microphone amplifier while
the other (TLI1) is at the hybrid output. Outputs RLO1
and TLO1 feed a comparator. The output of this compa-
U4084B
10 (26)
Signal
input
(TLI2)
(RLI2)
5.1k
5.1k
Signal input
RLI1
TLI1
F
F
(14)
(17)
23
20
V
V
B
B
+
+
"
Level detector
10%) to prevent timing
Preliminary Information
350
350
F
F
Level detector
A
(RLO2)
(TLO2)
22 (15)
21 (16)
W
RLO1
TLO1
Figure 4. Level detectors
resistor),
A
12
V
33k
B
+
rator goes to the attenuator control block. Likewise,
outputs RLO2 and TLO2 feed a second comparator which
also goes to the attenuator control block. The truth table
for the effects of the level detectors is given in the section
“Attenuator Control Block.
Background-Noise Monitors
The background-noise monitiors distinguish speech
(which consists of bursts) from background noise (a rela-
tively
background-noise monitors – one for the receive path and
the other for the transmit path. Referring to figure 4, the
receive background-noise monitor is operated by the
TLI2–TLO2 level detector.
Background-noise monitoring is carried out by storing a
DC voltage representative of the respective noise levels
in capacitors at CPR and CPT. The voltages at these pins
have slow rise times (determined by the external RC), but
fast decay times. If the signal at RLI1 (or TLI2) changes
slowly, the voltage at CPR (or CPT) will remain being
more positive than the voltage at the non-inverting input
of the monitor’s output comparator. When speech is
present, the voltage on the non-inverting input of the
comparator will rise quicker than the voltage at the
inverting input (due to the burst characteristic of speech),
causing its output to change. This output is sensed by the
attenuator control block”.
56k
Comparator
Background-noise monitor
+
constant
+
C2 (C1)
36 mV
signal
TELEFUNKEN Semiconductors
C4 (C3)
+
attenuator
control
level).
block
to
(13)
24
(CPT)
CPR
Rev. A1, 31-Jan-97
There
100k
are
12673
V
F
S
two

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