OPA890IDBV BURR-BROWN [Burr-Brown Corporation], OPA890IDBV Datasheet - Page 24

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OPA890IDBV

Manufacturer Part Number
OPA890IDBV
Description
Low-Power, Wideband, Voltage-Feedback OPERATIONAL AMPLIFIER with Disable
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet

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OPA890
SBOS369 – MAY 2007
24
Achieving
high-frequency amplifier such as the OPA890
requires careful attention to board layout parasitics
and external component types. Recommendations
that optimize performance include the following:
a. Minimize parasitic capacitance to any ac
b. Minimize the distance (< 0.25") from the
c. Careful
ground for all of the signal I/O pins. Parasitic
capacitance on the output and inverting input
pins can cause instability; on the noninverting
input, it can react with the source impedance
to cause unintentional bandlimiting. To reduce
unwanted capacitance, a window around the
signal I/O pins should be opened in all of the
ground and power planes around those pins.
Otherwise, ground and power planes should
be unbroken elsewhere on the board.
power-supply pins to high-frequency 0.1 F
decoupling capacitors. At the device pins, the
ground and power-plane layout should not be
in close proximity to the signal I/O pins. Avoid
narrow power and ground traces to minimize
inductance
decoupling
connections should always be decoupled with
these
decoupling capacitor (0.1 F) across the two
power supplies (for bipolar operation) will
improve 2nd-harmonic distortion performance.
Larger (2.2 F to 6.8 F) decoupling capacitors,
effective at lower frequencies, should also be
used on the main supply pins. These
capacitors may be placed somewhat farther
from the device and may be shared among
several devices in the same area of the PCB.
external
high-frequency
OPA890. Resistors should be a very low
reactance type. Surface-mount resistors work
best and allow a tighter overall layout. Metal
film or carbon composition axially-leaded
resistors
high-frequency performance. Again, keep the
leads and PCB traces as short as possible.
Never use wirewound type resistors in a
high-frequency
output pin and inverting input pin are the most
sensitive to parasitic capacitance, always
position the feedback and series output
resistor, if any, as close as possible to the
output pin. Other network components, such
as noninverting input termination resistors,
should also be placed close to the package.
Where double-side component mounting is
optimum
capacitors.
selection
components
can
capacitors.
between
application.
performance
performance
also
An
and
the
The
optional
preserves
provide
pins
placement
BOARD LAYOUT GUIDELINES
Because
power-supply
Submit Documentation Feedback
with
and
of
supply
good
the
the
the
the
of
a
d. Connections to other wideband devices on
allowed, place the feedback resistor directly
under the package on the other side of the
board between the output and inverting input
pins. Even with a low parasitic capacitance
shunting the external resistors, excessively
high resistor values can create significant time
constants that can degrade performance.
Good axial metal film or surface-mount
resistors have approximately 0.2pF in shunt
with the resistor. For resistor values > 1.5k ,
this parasitic capacitance can add a pole
and/or zero below 500MHz that can effect
circuit operation. Keep resistor values as low
as possible consistent with load driving
considerations. The 750
the Typical Characteristics is a good starting
point for design. Note that a direct short is
suggested
application.
the board may be made with short, direct
traces or through onboard transmission lines.
For short connections, consider the trace and
the input to the next device as a lumped
capacitive load. Relatively wide traces (50mils
to 100mils) should be used, preferably with
ground and power planes opened up around
them. Estimate the total capacitive load and
set R
Capacitive Load. Low parasitic capacitive
loads (< 5pF) may not need an R
the OPA890 is nominally compensated to
operate with a 2pF parasitic load. Higher
parasitic capacitive loads without an R
allowed
(increasing the unloaded phase margin). If a
long trace is required, and the 6dB signal loss
intrinsic to a doubly-terminated transmission
line is acceptable, implement a matched
impedance transmission line using microstrip
or stripline techniques (consult an ECL design
handbook for microstrip and stripline layout
techniques). A 50
not necessary on the board, and in fact, a
higher impedance environment will improve
distortion as shown in the distortion versus
load plots. With a characteristic board trace
impedance defined (based on board material
and trace dimensions), a matching series
resistor into the trace from the output of the
OPA890 is used as well as a terminating
shunt resistor at the input of the destination
device. Remember also that the terminating
impedance is the parallel combination of the
shunt resistor and the input impedance of the
destination
impedance should be set to match the trace
S
from the plot of Recommended R
as
for
device;
the
the
signal
environment is normally
this
unity-gain
feedback used in
gain
total
www.ti.com
S
increases
because
effective
follower
S
S
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