ADG3241 AD [Analog Devices], ADG3241 Datasheet - Page 4

• Manufacturer Part Number: ADG3241
• Description: 2.5 V/3.3 V, 1-Bit, 2-Port Level Translator Bus Switch in SOT-66
• Manufacturer: AD [Analog Devices]

ADG3241
Model
ADG3241BKS-REEL
ADG3241BKS-REEL7
ADG3241BKS-500RL7
ADG3241BRY-REEL7
V
GND
V
V
I
I
I
V
R
C
C
C
I
t
t
t
Max Data Rate
Channel Jitter
PLH
PZH
PHZ
I
OZ
OL
CC
I
CC
INH
INL
P
ON
X
X
IN
CC
OFF
ON
, t
, t
, t
PHL
PZL
PLZ
Positive Power Supply Voltage.
Ground (0 V) Reference.
Minimum Input Voltage for Logic 1.
Maximum Input Voltage for Logic 0.
Input Leakage Current at the Control Inputs.
OFF State Leakage Current. It is the maximum leakage current at the switch pin in the OFF state.
ON State Leakage Current. It is the maximum leakage current at the switch pin in the ON state.
Maximum Pass Voltage. The maximum pass voltage relates to the clamped output voltage of an NMOS device when
the switch input voltage is equal to the supply voltage.
Ohmic Resistance Offered by a Switch in the ON State. It is measured at a given voltage by forcing a specified
amount of current through the switch.
OFF Switch Capacitance.
ON Switch Capacitance.
Control Input Capacitance. This consists of BE and SEL.
Quiescent Power Supply Current. This current represents the leakage current between the V
It is measured when all control inputs are at a logic high or low level and the switches are OFF.
Extra power supply current component for the BE control input when the input is not driven at the supplies.
Data Propagation Delay through the Switch in the ON State. Propagation delay is related to the RC time constant
R
Bus Enable Times. These are the times taken to cross the V
in response to the control signal, BE.
Bus Disable Times. This is the time taken to place the switch in the high impedance OFF state in response to the control
signal. It is measured as the time taken for the output voltage to change by V from the original quiescent level,
with reference to the logic level transition at the control input. (Refer to Figure 3 for enable and disable times.)
Maximum Rate at which Data Can Be Passed through the Switch.
Peak-to-Peak Value of the Sum of the Deterministic and Random Jitter of the Switch Channel.
ON
PIN CONFIGURATION
GND
SEL
V
BE
CC
× C
A
A
6-Lead SOT-66
1
2
3
1
2
3
6-Lead SC70
L
, where C
(Not to Scale)
(Not to Scale)
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Temperature
Range
ADG3241
ADG3241
TOP VIEW
TOP VIEW
L
6
5
4
6
5
4
is the load capacitance.
BE
GND
SEL
V
B
B
CC
Package
Description
Thin Shrink Small Outline Transistor Package (SC70)
Thin Shrink Small Outline Transistor Package (SC70)
Thin Shrink Small Outline Transistor Package (SC70)
Small Outline Transistor Package (SOT-66)
ORDERING GUIDE
TERMINOLOGY
–4–
Pin No.
SC70
1
2
3
4
5
6
SOT-66
6
4
3
5
1
2
T
voltage at the switch output when the switch turns on
Table II. Pin Function Descriptions
Mnemonic
BE
GND
A
B
V
SEL
CC
Description
Bus Enable (Active Low)
Ground Reference
Port A, Input or Output
Port B, Input or Output
Positive Power Supply Voltage
Level Translation Select
Package
KS-6
KS-6
KS-6
RY-6-1
CC
and ground pins.
Branding
SKA
SKA
SKA
00
REV. A