AD9389KSTZ-80 AD [Analog Devices], AD9389KSTZ-80 Datasheet

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AD9389KSTZ-80

Manufacturer Part Number
AD9389KSTZ-80
Description
800 MHz High Performance HDMI/DVI Transmitter
Manufacturer
AD [Analog Devices]
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
AD9389KSTZ-80
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
HDMI/DVI transmitter compatible with HDMI 1.1 and
Single 1.8 V power supply
Video/audio inputs are 3.3 V tolerant
Supports HDCP 1.1 with encrypted internal HDCP key
80-lead LQFP
Digital video
Digital audio
Special features for easy system design
APPLICATIONS
DVD players and recorders
Digital set-top boxes
AV receivers
Digital cameras and camcorders
GENERAL DESCRIPTION
The AD9389 is an 80 MHz high-definition multimedia inter-
face (HDMI 1.1) transmitter. It supports HDTV formats up to
1080i and 720p, and graphic resolutions up to XGA (1024 × 768
@ 75 Hz). With the inclusion of HDCP, the AD9389 allows the
secure transmission of protected content as specified by the
HDCP 1.1 protocol.
The AD9389 supports both S/PDIF and 8-channel I
Its high fidelity 8-channel I
7.1 surround audio at 192 kHz. The S/PDIF can carry stereo
LPCM (linear pulse code modulation) audio or compressed
audio including Dolby® Digital, DTS®, and THX®.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
HDCP 1.1
storage
80 MHz operation supports all video formats from 480i to
Programmable 2-way color space converter
Supports RGB, YCbCr, DDR, ITU656 formats
Auto input video format detection
Supports standard S/PDIF for stereo or compressed audio
8-channel LPCM I
On-chip MPU to perform HDCP operations
On-chip I
5 V tolerant I
No audio master clock needed for S/PDIF support
1080i and 720p
up to 192 kHz
2
C® master to handle EDID reading
2
C and MPD I/Os, no extra device needed
2
S audio up to 192 kHz
2
S can transmit either stereo or
2
S audio.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The AD9389 helps to reduce system design complexity and cost
by incorporating such features as HDCP master, I
EDID reading, a single 1.8 V power supply, and 5 V tolerance
on I
Fabricated in an advanced CMOS process, the AD9389 is pro-
vided in a space-saving, 80-lead, surface-mount, Pb-free plastic
LQFP and is specified over the 0°C to 70°C temperature range.
EVALUATION KITS AND OTHER RESOURCES
Evaluation kits, reference design schematics, software quick
start guide, and codes are available from the Analog Devices
local sales and marketing personnel.
VSYNC
HSYNC
I
D[23:0]
S/PDIF
2
MCLK
S[3:0]
CLK
DE
2
C and hot plug detect pins.
800 MHz High Performance
CONFIGURATION
CAPTURE
CAPTURE
REGISTER
AUDIO
VIDEO
DATA
DATA
HTPG
LOGIC
HDMI™/DVI Transmitter
FUNCTIONAL BLOCK DIAGRAM
CONVERSION
CONVERSION
SCL
COLOR
SPACE
4:2:2
©2006 Analog Devices, Inc. All rights reserved.
SLAVE
4:4:4
TO
I
2
C
SDA
Figure 1.
MASTER
CIPHER
HDCP
I
2
C
MASK
XOR
CONTROLLER
AD9389
HDCP
CORE
HDM
ITX
AD9389
www.analog.com
2
C master for
DDSDA
DDCSCL
SWING_ADJ
Tx0[1:0]
Tx1[1:0]
Tx2[1:0]
TxC[1:0]

Related parts for AD9389KSTZ-80

AD9389KSTZ-80 Summary of contents

Page 1

FEATURES HDMI/DVI transmitter compatible with HDMI 1.1 and HDCP 1.1 Single 1.8 V power supply Video/audio inputs are 3.3 V tolerant Supports HDCP 1.1 with encrypted internal HDCP key storage 80-lead LQFP Digital video 80 MHz operation supports all video ...

Page 2

AD9389 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Evaluation Kits and Other Resources ............................................ 1 Revision History ............................................................................... 2 Electrical Specifications ................................................................... 3 Absolute Maximum Ratings............................................................ 5 Explanation of Test ...

Page 3

ELECTRICAL SPECIFICATIONS Table 1. Parameter DIGITAL INPUTS Input Voltage, High ( Input Voltage, Low ( Input Current, High ( Input Current, Low ( Input Capacitance DIGITAL OUTPUTS Output Voltage, High (V ) ...

Page 4

AD9389 Parameter AUDIO AC TIMING 2 Sample Rate (I S and S/PDIF Cycle Time Setup Time Hold Time Audio Pipeline Delay 1 See Table 3. 1 Temp Test Level Min Full ...

Page 5

ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Digital Inputs Digital Output Current Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Maximum Case Temperature ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on ...

Page 6

AD9389 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS HSYNC 4 VSYNC 5 CLK 6 S/PDIF ...

Page 7

Pin Type Pin No. Mnemonic 31, 30 Tx0+ Tx0− 40 INT POWER SUPPLY 24, 29, 36 61, 62, 63 16, 19, 20 15, 17, 18, 22, GND 26, 32, 39, 42, 43, 59, ...

Page 8

AD9389 Pin Mnemonic Description POWER SUPPLY DV Main Power Supply. These pins supply power to the main elements of the circuit. They should be filtered and as DD quiet as possible. AV Output Power Supply Clock Generator Power ...

Page 9

DESIGN GUIDE GENERAL DESCRIPTION The AD9389 HDMI transmitter provides a high bandwidth digital content protected (HDCP) digital link between a wide range of digital input formats—both audio and video (see Table 8) and output formats (see Table 9). Video and ...

Page 10

AD9389 Normal 4:4:4 Input Format (RGB or YCbCr) Input input format of RGB 4:4:4 or YCbCr 4:4:4 can be selected by setting the input ID (0x15[3:1]) to 0b000. The input color space (CS) must be selected ...

Page 11

YCbCr 4:2:2 Formats (24 bits, 20 bits bits) with Embedded Syncs, Input input with YCbCr 4:2:2 with embedded syncs can be selected by setting the input ID (0x15[3:1]) to 0b010. HSYNC and VSYNC are ...

Page 12

AD9389 YCbCr 4:2:2 DDR (Double Data Rate) Formats (12 bits, 10 bits bits) with Embedded Syncs, Input input with YCbCr 4:2:2 DDR data and embedded syncs (ITU 656) can be selected by setting the ...

Page 13

YCbCr 4:2:2 Formats (24 bits, 20 bits bits) DDR with Separate Sync, Input input format of YCbCr 4:2:2 DDR can be selected by setting the input ID (0x15[3:1]) to 0b110. The three different input ...

Page 14

AD9389 4:2:2 TO 4:4:4 DATA CONVERSION The AD9389 has the ability to convert YCbCr video from 4:4:4 to 4:2:2 and 4:2:2 to 4:4:4. To convert from 4:4:4 to 4:2:2, the video data goes through a filter first to remove any ...

Page 15

EAV VSYNC a: VSYNC PLACEMENT R0x32[3:0], R0x33[7:2] b: VSYNC DURATION R0x33[1:0], R0x34 a1[12:0] R [11:0] × IN a2[12:0] B [11:0] × IN a3[12:0] G [11:0] × IN COLOR SPACE CONVERSION MATRIX (CSC) The color space conversion matrix in the AD9389 ...

Page 16

AD9389 AUDIO DATA CAPTURE The AD9389 is capable of receiving audio data in either I S/PDIF format for packetization and transmission over the HDMI interface AUDIO The AD9389 can accommodate from two to eight channels of I ...

Page 17

N PARAMETER N shall be an integer number that meets the following restriction: 128 × f /1500 Hz ≤ N ≤ 128 × recommended optimal value of 128 × For coherent audio and video clock sources, ...

Page 18

AD9389 The AD9389 has two modes for CTS generation: manual mode and auto mode. In manual mode, the user can program the CTS number directly into the chip (0x07 to 0x09) and select this external mode by setting 0x0A[7] to ...

Page 19

HDCP HANDLING The AD9389 has a built-in microcontroller to handle HDCP transmitter states, including handling downstream HDCP repeaters. To activate HDCP from a system level, the main controller needs to set 0xAF[ inform AD9389 that the video ...

Page 20

AD9389 2-WIRE SERIAL REGISTER MAP The AD9389 is initialized and controlled by a set of registers that determine the operating modes. An external controller is employed to write and read the control registers through the two-line serial interface port. Table ...

Page 21

Hex Read/Write or Address Read Only Bits 0x0B Read/Write [6] [5] [4:0] 0x0C Read/Write [5:2] [1:0] 0x0D Read/Write [4:0] 0x0E Read/Write [5:3] [2:0] 0x0F Read/Write [5:3] [2:0] 0x10 Read/Write [5:3] [2:0] 0x11 Read/Write [5:3] [2:0] 0x12 Read/Write [5] [4:2] [1:0] ...

Page 22

AD9389 Hex Read/Write or Address Read Only Bits 0x14 Read/Write [7:4] [3:0] 0x15 Read/Write [7:4] [3:1] [0] 0x16 Read/Write [7:6] [5:4] [3:2] Default Value Register Name 0000**** Source Number ****0000 Word Length 2 0000**** I S_SF ****000* VFE_input_id *******0 low_frq_video ...

Page 23

Hex Read/Write or Address Read Only Bits [1] [0] 0x17 Read/Write [7] [6] [5] [4:3] [2] [1] [0] 0x18 Read/Write [4:0] 0x19 Read/Write [7:0] 0x1A Read/Write [4:0] 0x1B Read/Write [7:0] 0x1C Read/Write [4:0] 0x1D Read/Write [7:0] 0x1E Read/Write [4:0] Default ...

Page 24

AD9389 Hex Read/Write or Address Read Only Bits 0x1F Read/Write [7:0] 0x20 Read/Write [4:0] 0x21 Read/Write [7:0] 0x22 Read/Write [4:0] 0x23 Read/Write [7:0] 0x24 Read/Write [4:0] 0x25 Read/Write [7:0] 0x26 Read/Write [4:0] 0x27 Read/Write [7:0] 0x28 Read/Write [4:0] 0x29 Read/Write ...

Page 25

Hex Read/Write or Address Read Only Bits 0x36 Read/Write [7:6] [5:0] 0x37 Read/Write [7:5] [4:0] 0x38 Read/Write [7:1] 0x39 Read/Write [7:0] 0x3A Read/Write [7:4] 0x3B Read/Write [7] [6:5] [4:3] [2:1] [0] 0x3C Read/Write [5:0] 0x3D Read [7:6] [5:0] 0x3E Read ...

Page 26

AD9389 Hex Read/Write or Address Read Only Bits 0x40 Read/Write [7] [6] [5] [4] [3] 0x41 Read/Write [6] [5] [4] [3] 0x42 Read [7] [6] [5] 0x43 Read/Write [7:0] 0x44 Read/Write [7] [6] [5] [4] [3] 0x45 Read/Write [7] [6] ...

Page 27

Hex Read/Write or Address Read Only Bits 0x46 Read/Write [7:6] [5:4] [3:2] [1:0] 0x47 Read/Write [7:4] 0x48 Read/Write [7:0] 0x49 Read/Write [7:0] 0x4A Read/Write [7:0] 0x4B Read/Write [7:0] 0x4C Read/Write [7:0] 0x4D Read/Write [7:0] 0x4E Read/Write [7:0] 0x4F Read/Write [7:0] ...

Page 28

AD9389 Hex Read/Write or Address Read Only Bits 0x51 Read/Write [7:0] 0x52 Read/Write [7:0] 0x53 Read/Write [7:0] 0x54 Read/Write [7:0] 0x55 Read/Write [7:0] 0x56 Read/Write [7:0] 0x57 Read/Write [7:0] 0x58 Read/Write [7:0] 0x59 Read/Write [7:0] 0x5A Read/Write [7:0] 0x5B Read/Write ...

Page 29

Hex Read/Write or Address Read Only Bits 0x71 Read/Write [7:0] 0x72 Read/Write [7:0] 0x73 Read/Write [7] [6] [5:3] 0x74 Read/Write [7:0] 0x75 Read/Write [7:0] 0x76 Read/Write [7:0] 0x77 Read/Write [7:0] 0x78 Read/Write [7:0] 0x79 Read/Write [7:0] 0x7A Read/Write [7:0] 0x7B ...

Page 30

AD9389 Hex Read/Write or Address Read Only Bits 0x90 Read/Write [7:0] 0x91 Read/Write [7:0] 0x92 Read/Write [7:0] 0x93 Read/Write [7:0] 0x94 Read/Write [7:0] 0x95 Read/Write [7:6] 0x96 Read/Write [7] [6] [5] [4] [3] [2] 0x97 Read/Write [7] [6] [2] 0x98 ...

Page 31

Hex Read/Write or Address Read Only Bits 0xB7 Read [7:0] [6] [5] [4] 0xBA Read/Write [7:5] [4] [3] 0xBE Read [7] [6] [5] [4] [3:2] [1] [0] 0xBF Read [7:0] 0xC0 Read [7:0] 0xC1 Read [7:0] 0xC2 Read [7:0] 0xC3 ...

Page 32

AD9389 Hex Read/Write or Address Read Only Bits 0xC8 Read [7:4] [3:0] 0xC9 Read/Write [3:0] Default Value Register Name 0000**** HDCP Controller Error ****0000 HDCP Controller State ****0011 EDID Tries Rev Page Description HDCP controller ...

Page 33

AD9389 2-WIRE SERIAL CONTROL REGISTER DETAIL CHIP IDENTIFICATION 0x00—Bits[7:0] Chip Revision An 8-bit register that represents the silicon revision. 0x01—Bits[3:0] N[19:16] These are the most significant four bits of a 20-bit word used along with the 20-bit CTS term in ...

Page 34

AD9389 Table 23. Source of Subpacket Audio Field Code Channel ( and Left/Right 000 Channel 0 Left 001 Channel 0 Right 010 Channel 1 Left 011 Channel 1 Right 100 Channel 2 Left 101 Channel 2 Right 110 ...

Page 35

Table 24. VID Format Vertical Refresh 1 480p ~ 480p ~ 480p ~ 720p ~ 1080i ~ 480i ~ 480i ~ 240p ~60 Hz ...

Page 36

AD9389 0x50—Bits[7:5] audio_IF_cc 000 = refer to stream header 001 = 2 channels 010 = 3 channels … 111 = 8 channels 0x51—Bits[7:0] Speaker Mapping These bits define the suggested placement of speakers. Table 25. CA Bit 4 Bit 3 ...

Page 37

SOURCE PRODUCT DESCRIPTION (SPD) INFOFRAME 0x52—Bits[7:0] SPD_B1 This is the first character in eight that is the name of the company that appears on the product. The data characters are 7-bit ASCII code. 0x53—Bits[7:0] SPD_B 2 (VN2) 0x54—Bits[7:0] SPD_B 3(VN3) ...

Page 38

AD9389 0x84—Bits[7:0] ISRC2_PB0 This is transmitted only when the ISRC continue bit (Register 0x73 Bit 7) is set to 1. 0x85—Bits[7:0] ISRC2_PB1 0x86—Bits[7:0] ISRC2_PB2 0x87—Bits[7:0] ISRC2_PB3 0x88—Bits[7:0] ISRC2_PB4 0x89—Bits[7:0] ISRC2_PB5 0x8A—Bits[7:0] ISRC2_PB6 0x8B—Bits[7:0] ISRC2_PB7 0x8C—Bits[7:0] ISRC2_PB8 0x8D—Bits[7:0] ISRC2_PB9 0x8E—Bits[7:0] ISRC2_PB10 ...

Page 39

HDCP Controller Error When an error occurs in the HDCP flow reported here after setting the error flag (0xC5[7]). Table 28. Error Code Error Condition 0000 No error 0001 Bad receiver BKSV 0010 Ri mismatch 0011 Pj ...

Page 40

AD9389 2-WIRE SERIAL CONTROL PORT A 2-wire serial interface is provided two AD9389 devices can be connected to the 2-wire serial interface, with each device having a unique address. The 2-wire serial interface comprises a clock (SCL) and ...

Page 41

SERIAL INTERFACE READ/WRITE EXAMPLES Write to one control register: • Start signal • Slave address byte (R/ W bit = low) • Base address byte • Data byte to base address • Stop signal • Write to four consecutive control ...

Page 42

AD9389 PCB LAYOUT RECOMMENDATIONS The AD9389 is a high precision, high speed analog device. As such, to get the maximum performance out of the part important to have a well laid out board. The following is a guide ...

Page 43

COLOR SPACE CONVERTER (CSC) COMMON SETTINGS Table 30. HDTV YCbCr (0 to 255) to RGB (0 to 255) (Default Setting for AD9389) Register Red/Cr Coeff 1 Address 0x18 0x19 Value 0x0C 0x52 Register Green/Y Coeff 1 Address 0x20 0x21 Value ...

Page 44

AD9389 Table 34. RGB (0 to 255) to HDTV YCbCr (0 to 255) Register Red/Cr Coeff 1 Address 0x18 0x19 Value 0x08 0x2D Register Green/Y Coeff 1 Address 0x20 0x21 Value 0x03 0x68 Register Blue/Cb Coeff 1 Address 0x28 0x29 ...

Page 45

... OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range 1 0°C to 70°C AD9389KSTZ-80 AD9389/PCB Pb-free part. 16.20 16.00 SQ 0.75 1.60 15.80 0.60 MAX 0. PIN 1 TOP VIEW (PINS DOWN) 0.20 0.09 7° 3.5° 20 0° 21 0.10 MAX COPLANARITY VIEW A 0.65 BSC LEAD PITCH COMPLIANT TO JEDEC STANDARDS MS-026-BEC Figure 13 ...

Page 46

AD9389 Notes Rev Page ...

Page 47

NOTES Rev Page AD9389 ...

Page 48

AD9389 NOTES 2 Purchase of licensed I C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, ...

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