ADT7408CCPZ-R2 AD [Analog Devices], ADT7408CCPZ-R2 Datasheet - Page 11

• Manufacturer Part Number: ADT7408CCPZ-R2
• Description: +-2 C Accurate, 12-Bit Digital Temperature Sensor
• Manufacturer: AD [Analog Devices]

CONFIGURATION REGISTER (READ/WRITE)
This 16-bit read/write register stores various configuration modes for the ADT7408, as shown in Table 8 and the following bit map.
Note that RFU means reserved for future use.
MSB
D15
RFU
Table 8. Configuration Mode Description
Bit
D0
D1
D2
D3
D4
D5
D6
D7
D8
D14
RFU
Description
Event mode
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event polarity
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Critical event only
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event output control
When either lock bit (D6 and D7) is set, this bit cannot be altered until unlocked.
Event output status (read only)
The actual cause of an event can be determined from the read of the temperature value register. Interrupt events can be cleared
by writing to the clear event bit. Writing to this bit has no effect on the output status because it is a read function only.
Clear event (write only)
Writing to this register has no effect in comparator mode. When read, this bit always returns 0. Once the DUT temperature
is greater than the critical temperature, an event cannot be cleared (see Figure 12).
Alarm window lock bit
This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
Critical trip lock bit
This bit is initially cleared. When set, this bit returns a 1 and remains locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
Shutdown mode
When shut down, the thermal sensing device and ADC are disabled to save power. No events are generated. When either lock bit
is set, this bit cannot be set until unlocked. However, it can be cleared at any time.
0: Comparator output mode (default)
1: Interrupt mode
0: Active low (default)
1: Active high
0: Event output on alarm or critical temperature event (default)
1: Event only if temperature is above the value in the critical temperature trip register
0: Event output disabled (default)
1: Event output enabled
0: Event output condition is not being asserted by this device
1: Event output pin is being asserted by this device due to alarm window or critical trip condition
0: No effect
1: Clears an active event in interrupt mode
0: Alarm trips are not locked and can be altered (default)
1: Alarm trip register settings cannot be altered
0: Critical trip is not locked and can be altered (default)
1: Critical trip register settings cannot be altered
0: TS enabled (default)
1: TS shut down
D13
RFU
D12
RFU
D11
RFU
D10
Hysteresis
D9
D8
Shut-
down
mode
D7
Critical
lock bit
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D6
Alarm
lock bit
D5
Clear
event
D4
Event
output
status
D3
Event
output
control
D2
Critical
event
only
D1
Event
polarity
ADT7408
LSB
D0
Event
mode