AT42QTAN0040 ATMEL [ATMEL Corporation], AT42QTAN0040 Datasheet - Page 5

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AT42QTAN0040

Manufacturer Part Number
AT42QTAN0040
Description
Driving the AT42QT2160 QMatrix Sensor IC
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
5. I
5.1
5.2
5.3
10702A–AT42–07/08
2
C-compatible Driver
I
Design Approach
Macros
2
C-compatible Communication
I
form of I
Most current microprocessors include a hardware I
be programmed to efficiently handle these transfers, but the driver code will always be specific to
the hardware. The example code in this application note includes a software-based
I
many processor types.
The I
fully described in the QT2160 datasheet.
The driver presented here uses bit-banging techniques to manage the I
The driver is structured in three layers:
The following sections describe the driver and should be read in conjunction with the code
listing.
Table 5-1
that changes the state of a pin includes a fixed 5 µs delay following the edge. The 5 µs delay
ensures the 100 kHz I
66 kHz.
Table 5-1.
2
2
Macro
I2cDelay
SetHiSCL
SetLoSCL
SetHiSDA
C-compatible communication is a major aspect of any program involving the QT2160. Some
C-compatible driver using two port pins of the host microcontroller. It could easily be ported to
• In the bottom layer, code-macros are used to drive the SCL and SDA pins and to create
• In the middle layer, the SendByte() and GetByte() functions sequence the transmission and
• In the top layer, the WriteQtI2c() and ReadQtI2c() functions can be called by an application to
START and STOP conditions on the I
reception of bytes including handling the ACK bit.
transfer one or more bytes to and from the QT2160. Note that for the sake of clarity, the driver
is simplified (for example, it includes no timeouts).
2
C-compatible communication sequences used to read and write data to the QT2160 are
2
C-compatible driver must be written to handle read and write operations to the device.
describes the various code macros used to drive the SCL and SDA pins. Any macro
Code Macros for the I
2
C-compatible specification is met and results in a bus clock rate of around
Description
Generates a program-delay to guarantee I
requirements. The constant BUS_DELAY should be adjusted to
produce a 5 µs delay.
Floats the SCL pin. SCL is then pulled high by the pull-up resistor.
Note: the QT2160 may extend the low clock-phase. This means that
after floating the pin, the driver waits until the high state is achieved
before continuing.
Drives the SCL pin low. There is no need to wait for the pin to achieve
the low state.
Floats the SDA pin. SDA is then pulled high by the pull-up resistor.
After floating the pin, the driver waits until the high state is achieved
before continuing.
2
C-compatible Bus Functions
2
C-compatible bus.
Driving the AT42QT2160
2
C-compatible master function, which could
2
C-compatible timing
2
C-compatible interface.
5

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