AT42QT1111MU ATMEL [ATMEL Corporation], AT42QT1111MU Datasheet - Page 29

• Manufacturer Part Number: AT42QT1111MU
• Manufacturer: ATMEL [ATMEL Corporation]

Table 7-1.
7.2
7.3
7.4
9571A–AT42–02/10
Address
32
33
34
35
36
37
38
39
40
41
Setting Individual Settings
Setting All the Setups
Address 0: Device Mode
Memory Map (Continued)
Function
Key1 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key2 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key3 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key4 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key5 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key6 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key7 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key8 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key9 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
Key10 Negative Drift Compensation (NDRIFT)/Negative Recalibration Delay (NRD)
To set up an individual setup value, the host sends the command listed under the
Command”
For details of the communication flow, see
The host can send all 42 bytes of setup data to the QT1111 as a block using the Send Setups
command. See
The Device Mode controls the overall operation of the device: number of keys, acquisition
method, timing and trigger mechanism.
Table 7-2.
KEY_AC: selects the trigger source to start key acquisition; 0 = SYNC pin, 1 = timed.
MODE: selects 7-key or 11-key mode; 0 = default 7-key mode, 1 = 11-key mode.
SIGNAL: selects serial or parallel acquisition of keys signals; 0 = serial, 1 = parallel.
SYNC: selects the trigger type when SYNC Pin is selected as the trigger to start key acquisition.
Address
0
0 = Level
1 = Edge
column in
KEY_AC
Bit 7
Device Mode
Section 5.2 on page 22
Table
Acquisition starts when a “0” is read at the SYNC pin. If the pin is held
low, the QT1111 operates in “Free run” mode (that is, it will not sleep in
between acquisitions, but start again immediately).
Acquisition starts when a rising edge is detected at the SYNC pin.
When acquisition and post-processing are completed, the device
sleeps until another rising edge is detected at the SYNC pin.
MODE
Bit 6
7-1, followed by a byte of data.
AT42QT1111-MU/AT42QT1111-AU
SIGNAL
Bit 5
for details.
Section 4.1 on page
SYNC
Bit 4
Bit 3
10.
Set Command
Bit 2
REPEAT_TIME
0xBA
0xB1
0xB2
0xB3
0xB4
0xB5
0xB6
0xB7
0xB8
0xB9
Bit 1
Get Command
0xFA
0xF1
0xF2
0xF3
0xF4
0xF5
0xF6
0xF7
0xF8
0xF9
Bit 0
“Set
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