ATA6827_07 ATMEL [ATMEL Corporation], ATA6827_07 Datasheet
ATA6827_07
Related parts for ATA6827_07
ATA6827_07 Summary of contents
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Features • Supply Voltage up to 40V • R Typically 0.8Ω at 25°C, Maximum 1.8Ω at 200°C DSon • 1.0A Output Current • Three Half-bridge Outputs Formed by Three High-side and Three Low-side Drivers • Capable to Switch ...
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Figure 1-1. Block Diagram Input register Ouput register CLK Fault INH detector Fault detector 1 OUT3S OUT3F ATA6827 ...
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Pin Configuration Figure 2-1. Pinning QFN18 Table 2-1. Pin Description Pin Symbol Function 1 OUT3S Used only for final testing connected to OUT3F 2 OUT3F Half-bridge output 3 Chip select input; 5-V CMOS logic level input with ...
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Functional Description 3.1 Serial Interface Data transfer starts with the falling edge of the CS signal. Data must appear at DI synchronized to CLK and are accepted on the falling edge of the CLK signal. LSB (bit 0, SRR) ...
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Table 3-2. Bit After power-on reset, the input register has the following status: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 (OCS) ...
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Power-supply Fail In case of undervoltage at pin VS, the Power-Supply Fail bit (PSF) in the output register is set and all outputs are disabled. To detect an undervoltage, its duration has to be longer than the undervoltage detection ...
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Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated ...
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Noise and Surge Immunity Parameters Conducted interferences Interference suppression ESD (Human Body Model) CDM (Charged Device Model) Note: Test pulse 40V smax 8. Electrical Characteristics < 5.25 V; INH = High; –40°C ≤ T 7.5V < ...
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Electrical Characteristics (Continued) < 5.25 V; INH = High; –40°C ≤ T 7.5V < V < 40V; 4.75V < VCC GND pins. No. Parameters Test Conditions Thermal shutdown 3.6 hysteresis Ratio thermal shutdown 3.7 off/thermal prewarning set ...
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Electrical Characteristics (Continued) < 5.25 V; INH = High; –40°C ≤ T 7.5V < V < 40V; 4.75V < VCC GND pins. No. Parameters Test Conditions High-side output switch V VS 4.13 (1) on delay R Load ...
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Serial Interface – Timing No. Parameters Test Conditions DO enable after CS 8 100 pF DO falling edge DO disable after CS 8 100 pF DO rising edge 8.3 DO fall time C = 100 ...
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Figure 9-1. Serial Interface Timing with Chart Numbers CS 4 CLK 3 DI CLK DO Inputs DI, CLK, CS: High level = 0.7 Output DO: High level = 0.8 ATA6827 ...
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Application Circuit Figure 10-1. Application Circuit V CC Enable U5021M Watchdog DI 4 CLK Micro- INH controller 11. Application Notes It is strongly recommended to connect the blocking capacitors at V ...
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Ordering Information Extended Type Number ATA6827-PIQW 13. Package Information Package: VQFN_4 x 4_18L Exposed pad 2.7 x 3.175 Dimensions in mm Not indicated tolerances ±0.05 Pin 1 identification Drawing-No.: 6.543-5133.01-4 Issue: 1; 26.04.07 14. Revision History Please note that ...
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Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...