AD8117_07 AD [Analog Devices], AD8117_07 Datasheet - Page 5

• Manufacturer Part Number: AD8117_07
• Manufacturer: AD [Analog Devices]

TIMING CHARACTERISTICS (SERIAL MODE)
Specifications subject to change without notice.
Table 2.
Parameter
Serial Data Setup Time
CLK Pulse Width
Serial Data Hold Time
CLK Pulse Separation
CLK to UPDATE Delay
UPDATE Pulse Width
CLK to DATA OUT Valid
Propagation Delay, UPDATE to Switch On or Off
RESET Pulse Width
RESET Time
Table 3. Logic Levels
V
RESET,
SER/PAR, CLK,
DATA IN,
UPDATE
2.0 V min
1
See Figure 15.
IH
0 = TRANSPARENT
V
RESET,
SER/PAR, CLK,
DATA IN,
UPDATE
0.6 V max
IL
1 = LATCHED
DATA OUT
UPDATE
DATA IN
CLK
WE
1
0
1
0
1
0
OUT31 (D5)
V
DATA OUT
V
t
DD
OH
1
− 0.3 V min
t
3
t
t
7
2
Figure 2. Timing Diagram, Serial Mode
V
DATA OUT
D
OL
GND
t
4
+ 0.5 V max
OUT30 (D4)
Rev. A | Page 5 of 36
Symbol
t
t
t
t
t
t
t
1
2
3
4
5
6
7
SERIAL REGISTER
ON FALLING EDGE
LOAD DATA INTO
I
RESET
SER/PAR, CLK,
DATA IN,
UPDATE
1 μA max
IH
1
,
TRANSFER DATA FROM SERIAL
LATCHES DURING LOW LEVEL
Min
40
50
50
150
10
90
120
60
REGISTER TO PARALLEL
I
RESET
SER/PAR, CLK,
DATA IN,
UPDATE
–1 μA min
IL
Typ
100
200
1
,
t
5
Limit
OUT00 (D0)
I
DATA OUT
−1 mA max
OH
Max
t
6
AD8117/AD8118
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
I
DATA OUT
1 mA min
OL